[NFC][TableGen] Add IfGuardEmitter and adopt it in InstrInfoEmitter (#168616)

Add a RAII `IfGuardEmitter` to insert simple #if guards and adopt it in
InstrInfoEmitter.

Author: jurahul

llvm/include/llvm/TableGen/CodeGenHelpers.h

@@ -46,6 +46,23 @@ class IfDefEmitter {
   bool LateUndef;
 };
 
+// Simple RAII helper for emitting #if guard. It emits:
+// #if <Condition>
+// #endif // <Condition>
+class IfGuardEmitter {
+public:
+  IfGuardEmitter(raw_ostream &OS, StringRef Condition)
+      : Condition(Condition.str()), OS(OS) {
+    OS << "#if " << Condition << "\n\n";
+  }
+
+  ~IfGuardEmitter() { OS << "\n#endif // " << Condition << "\n\n"; }
+
+private:
+  std::string Condition;
+  raw_ostream &OS;
+};
+
 // Simple RAII helper for emitting header include guard (ifndef-define-endif).
 class IncludeGuardEmitter {
 public:

llvm/utils/TableGen/InstrInfoEmitter.cpp

@@ -943,24 +943,23 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
     }
   }
 
-  OS << "#if defined(GET_INSTRINFO_MC_DESC) || "
-        "defined(GET_INSTRINFO_CTOR_DTOR)\n";
-
-  OS << "namespace llvm {\n\n";
-
-  OS << "struct " << TargetName << "InstrTable {\n";
-  OS << "  MCInstrDesc Insts[" << NumberedInstructions.size() << "];\n";
-  OS << "  static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "
-        "\"Unwanted padding between Insts and OperandInfo\");\n";
-  OS << "  MCOperandInfo OperandInfo[" << OperandInfoSize << "];\n";
-  OS << "  static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "
-        "\"Unwanted padding between OperandInfo and ImplicitOps\");\n";
-  OS << "  MCPhysReg ImplicitOps[" << std::max(ImplicitListSize, 1U) << "];\n";
-  OS << "};\n\n";
-
-  OS << "} // end namespace llvm\n";
-  OS << "#endif // defined(GET_INSTRINFO_MC_DESC) || "
-        "defined(GET_INSTRINFO_CTOR_DTOR)\n\n";
+  {
+    IfGuardEmitter IfGuard(
+        OS,
+        "defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)");
+    NamespaceEmitter NS(OS, "llvm");
+
+    OS << "struct " << TargetName << "InstrTable {\n";
+    OS << "  MCInstrDesc Insts[" << NumberedInstructions.size() << "];\n";
+    OS << "  static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "
+          "\"Unwanted padding between Insts and OperandInfo\");\n";
+    OS << "  MCOperandInfo OperandInfo[" << OperandInfoSize << "];\n";
+    OS << "  static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "
+          "\"Unwanted padding between OperandInfo and ImplicitOps\");\n";
+    OS << "  MCPhysReg ImplicitOps[" << std::max(ImplicitListSize, 1U)
+       << "];\n";
+    OS << "};";
+  }
 
   const CodeGenRegBank &RegBank = Target.getRegBank();
   const CodeGenHwModes &CGH = Target.getHwModes();