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1 | 1 | ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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2 |
| -; RUN: opt < %s -passes=gvn -S | FileCheck %s |
| 2 | +; RUN: opt < %s -passes=gvn -S | FileCheck %s --check-prefixes=CHECK,MDEP |
| 3 | +; RUN: opt < %s -passes='gvn<memoryssa>' -S | FileCheck %s --check-prefixes=CHECK,MSSA |
3 | 4 | target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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4 | 5 |
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5 | 6 | @a = common global [100 x i64] zeroinitializer, align 16
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@@ -50,32 +51,56 @@ if.end: ; preds = %if.then, %entry
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50 | 51 | }
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51 | 52 |
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52 | 53 | define void @test2(i64 %i) {
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53 |
| -; CHECK-LABEL: @test2( |
54 |
| -; CHECK-NEXT: entry: |
55 |
| -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I:%.*]] |
56 |
| -; CHECK-NEXT: [[T0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8 |
57 |
| -; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I]] |
58 |
| -; CHECK-NEXT: [[T1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8 |
59 |
| -; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[T1]], [[T0]] |
60 |
| -; CHECK-NEXT: store i64 [[MUL]], ptr @g1, align 8 |
61 |
| -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MUL]], 3 |
62 |
| -; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] |
63 |
| -; CHECK: if.then: |
64 |
| -; CHECK-NEXT: [[CALL:%.*]] = tail call i64 (...) @goo() |
65 |
| -; CHECK-NEXT: store i64 [[CALL]], ptr @g2, align 8 |
66 |
| -; CHECK-NEXT: [[T2_PRE:%.*]] = load i64, ptr getelementptr inbounds nuw (i8, ptr @a, i64 24), align 8 |
67 |
| -; CHECK-NEXT: [[T3_PRE:%.*]] = load i64, ptr getelementptr inbounds nuw (i8, ptr @b, i64 24), align 8 |
68 |
| -; CHECK-NEXT: [[DOTPRE:%.*]] = mul nsw i64 [[T3_PRE]], [[T2_PRE]] |
69 |
| -; CHECK-NEXT: br label [[IF_END]] |
70 |
| -; CHECK: if.end: |
71 |
| -; CHECK-NEXT: [[MUL5_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE]], [[IF_THEN]] ], [ [[MUL]], [[ENTRY:%.*]] ] |
72 |
| -; CHECK-NEXT: [[T3:%.*]] = phi i64 [ [[T3_PRE]], [[IF_THEN]] ], [ [[T1]], [[ENTRY]] ] |
73 |
| -; CHECK-NEXT: [[T2:%.*]] = phi i64 [ [[T2_PRE]], [[IF_THEN]] ], [ [[T0]], [[ENTRY]] ] |
74 |
| -; CHECK-NEXT: [[I_ADDR_0:%.*]] = phi i64 [ 3, [[IF_THEN]] ], [ [[I]], [[ENTRY]] ] |
75 |
| -; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I_ADDR_0]] |
76 |
| -; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I_ADDR_0]] |
77 |
| -; CHECK-NEXT: store i64 [[MUL5_PRE_PHI]], ptr @g3, align 8 |
78 |
| -; CHECK-NEXT: ret void |
| 54 | +; MDEP-LABEL: @test2( |
| 55 | +; MDEP-NEXT: entry: |
| 56 | +; MDEP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I:%.*]] |
| 57 | +; MDEP-NEXT: [[T0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8 |
| 58 | +; MDEP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I]] |
| 59 | +; MDEP-NEXT: [[T1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8 |
| 60 | +; MDEP-NEXT: [[MUL:%.*]] = mul nsw i64 [[T1]], [[T0]] |
| 61 | +; MDEP-NEXT: store i64 [[MUL]], ptr @g1, align 8 |
| 62 | +; MDEP-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MUL]], 3 |
| 63 | +; MDEP-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] |
| 64 | +; MDEP: if.then: |
| 65 | +; MDEP-NEXT: [[CALL:%.*]] = tail call i64 (...) @goo() |
| 66 | +; MDEP-NEXT: store i64 [[CALL]], ptr @g2, align 8 |
| 67 | +; MDEP-NEXT: [[T2_PRE:%.*]] = load i64, ptr getelementptr inbounds nuw (i8, ptr @a, i64 24), align 8 |
| 68 | +; MDEP-NEXT: [[T3_PRE:%.*]] = load i64, ptr getelementptr inbounds nuw (i8, ptr @b, i64 24), align 8 |
| 69 | +; MDEP-NEXT: [[DOTPRE:%.*]] = mul nsw i64 [[T3_PRE]], [[T2_PRE]] |
| 70 | +; MDEP-NEXT: br label [[IF_END]] |
| 71 | +; MDEP: if.end: |
| 72 | +; MDEP-NEXT: [[MUL5_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE]], [[IF_THEN]] ], [ [[MUL]], [[ENTRY:%.*]] ] |
| 73 | +; MDEP-NEXT: [[T3:%.*]] = phi i64 [ [[T3_PRE]], [[IF_THEN]] ], [ [[T1]], [[ENTRY]] ] |
| 74 | +; MDEP-NEXT: [[T2:%.*]] = phi i64 [ [[T2_PRE]], [[IF_THEN]] ], [ [[T0]], [[ENTRY]] ] |
| 75 | +; MDEP-NEXT: [[I_ADDR_0:%.*]] = phi i64 [ 3, [[IF_THEN]] ], [ [[I]], [[ENTRY]] ] |
| 76 | +; MDEP-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I_ADDR_0]] |
| 77 | +; MDEP-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I_ADDR_0]] |
| 78 | +; MDEP-NEXT: store i64 [[MUL5_PRE_PHI]], ptr @g3, align 8 |
| 79 | +; MDEP-NEXT: ret void |
| 80 | +; |
| 81 | +; MSSA-LABEL: @test2( |
| 82 | +; MSSA-NEXT: entry: |
| 83 | +; MSSA-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I:%.*]] |
| 84 | +; MSSA-NEXT: [[T0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8 |
| 85 | +; MSSA-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I]] |
| 86 | +; MSSA-NEXT: [[T1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8 |
| 87 | +; MSSA-NEXT: [[MUL:%.*]] = mul nsw i64 [[T1]], [[T0]] |
| 88 | +; MSSA-NEXT: store i64 [[MUL]], ptr @g1, align 8 |
| 89 | +; MSSA-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MUL]], 3 |
| 90 | +; MSSA-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] |
| 91 | +; MSSA: if.then: |
| 92 | +; MSSA-NEXT: [[CALL:%.*]] = tail call i64 (...) @goo() |
| 93 | +; MSSA-NEXT: store i64 [[CALL]], ptr @g2, align 8 |
| 94 | +; MSSA-NEXT: br label [[IF_END]] |
| 95 | +; MSSA: if.end: |
| 96 | +; MSSA-NEXT: [[I_ADDR_0:%.*]] = phi i64 [ 3, [[IF_THEN]] ], [ [[I]], [[ENTRY:%.*]] ] |
| 97 | +; MSSA-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I_ADDR_0]] |
| 98 | +; MSSA-NEXT: [[T2:%.*]] = load i64, ptr [[ARRAYIDX3]], align 8 |
| 99 | +; MSSA-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I_ADDR_0]] |
| 100 | +; MSSA-NEXT: [[T3:%.*]] = load i64, ptr [[ARRAYIDX4]], align 8 |
| 101 | +; MSSA-NEXT: [[MUL5:%.*]] = mul nsw i64 [[T3]], [[T2]] |
| 102 | +; MSSA-NEXT: store i64 [[MUL5]], ptr @g3, align 8 |
| 103 | +; MSSA-NEXT: ret void |
79 | 104 | ;
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80 | 105 | entry:
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81 | 106 | %arrayidx = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 %i
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@@ -252,29 +277,50 @@ if.end3: ; preds = %if.then2, %if.else,
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252 | 277 | ; available in if.then. Check that we correctly phi-translate to the phi that
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253 | 278 | ; the load has been replaced with.
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254 | 279 | define void @test6(ptr %ptr, i1 %arg) {
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255 |
| -; CHECK-LABEL: @test6( |
256 |
| -; CHECK-NEXT: entry: |
257 |
| -; CHECK-NEXT: [[ARRAYIDX1_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1 |
258 |
| -; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, ptr [[ARRAYIDX1_PHI_TRANS_INSERT]], align 4 |
259 |
| -; CHECK-NEXT: br label [[WHILE:%.*]] |
260 |
| -; CHECK: while: |
261 |
| -; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[IF_END:%.*]] ] |
262 |
| -; CHECK-NEXT: [[I:%.*]] = phi i64 [ 1, [[ENTRY]] ], [ [[I_NEXT:%.*]], [[IF_END]] ] |
263 |
| -; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[I]] |
264 |
| -; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 |
265 |
| -; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[I_NEXT]] |
266 |
| -; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4 |
267 |
| -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], [[TMP1]] |
268 |
| -; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END]] |
269 |
| -; CHECK: if.then: |
270 |
| -; CHECK-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX1]], align 4 |
271 |
| -; CHECK-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX2]], align 4 |
272 |
| -; CHECK-NEXT: br label [[IF_END]] |
273 |
| -; CHECK: if.end: |
274 |
| -; CHECK-NEXT: [[TMP2]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ [[TMP1]], [[WHILE]] ] |
275 |
| -; CHECK-NEXT: br i1 [[ARG:%.*]], label [[WHILE_END:%.*]], label [[WHILE]] |
276 |
| -; CHECK: while.end: |
277 |
| -; CHECK-NEXT: ret void |
| 280 | +; MDEP-LABEL: @test6( |
| 281 | +; MDEP-NEXT: entry: |
| 282 | +; MDEP-NEXT: [[ARRAYIDX1_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1 |
| 283 | +; MDEP-NEXT: [[DOTPRE:%.*]] = load i32, ptr [[ARRAYIDX1_PHI_TRANS_INSERT]], align 4 |
| 284 | +; MDEP-NEXT: br label [[WHILE:%.*]] |
| 285 | +; MDEP: while: |
| 286 | +; MDEP-NEXT: [[TMP0:%.*]] = phi i32 [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[IF_END:%.*]] ] |
| 287 | +; MDEP-NEXT: [[I:%.*]] = phi i64 [ 1, [[ENTRY]] ], [ [[I_NEXT:%.*]], [[IF_END]] ] |
| 288 | +; MDEP-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[I]] |
| 289 | +; MDEP-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 |
| 290 | +; MDEP-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[I_NEXT]] |
| 291 | +; MDEP-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4 |
| 292 | +; MDEP-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], [[TMP1]] |
| 293 | +; MDEP-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END]] |
| 294 | +; MDEP: if.then: |
| 295 | +; MDEP-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX1]], align 4 |
| 296 | +; MDEP-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX2]], align 4 |
| 297 | +; MDEP-NEXT: br label [[IF_END]] |
| 298 | +; MDEP: if.end: |
| 299 | +; MDEP-NEXT: [[TMP2]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ [[TMP1]], [[WHILE]] ] |
| 300 | +; MDEP-NEXT: br i1 [[ARG:%.*]], label [[WHILE_END:%.*]], label [[WHILE]] |
| 301 | +; MDEP: while.end: |
| 302 | +; MDEP-NEXT: ret void |
| 303 | +; |
| 304 | +; MSSA-LABEL: @test6( |
| 305 | +; MSSA-NEXT: entry: |
| 306 | +; MSSA-NEXT: br label [[WHILE:%.*]] |
| 307 | +; MSSA: while: |
| 308 | +; MSSA-NEXT: [[I:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[IF_END:%.*]] ] |
| 309 | +; MSSA-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 [[I]] |
| 310 | +; MSSA-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX1]], align 4 |
| 311 | +; MSSA-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 |
| 312 | +; MSSA-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[I_NEXT]] |
| 313 | +; MSSA-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4 |
| 314 | +; MSSA-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], [[TMP1]] |
| 315 | +; MSSA-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END]] |
| 316 | +; MSSA: if.then: |
| 317 | +; MSSA-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX1]], align 4 |
| 318 | +; MSSA-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX2]], align 4 |
| 319 | +; MSSA-NEXT: br label [[IF_END]] |
| 320 | +; MSSA: if.end: |
| 321 | +; MSSA-NEXT: br i1 [[ARG:%.*]], label [[WHILE_END:%.*]], label [[WHILE]] |
| 322 | +; MSSA: while.end: |
| 323 | +; MSSA-NEXT: ret void |
278 | 324 | ;
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279 | 325 | entry:
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280 | 326 | br label %while
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@@ -304,24 +350,40 @@ while.end:
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304 | 350 | ; Load from arrayidx2 is partially redundant, check that address translation can
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305 | 351 | ; fold sext + trunc across phi node together.
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306 | 352 | define i32 @test7(ptr noalias %ptr1, ptr noalias %ptr2, i32 %i, i1 %cond) {
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307 |
| -; CHECK-LABEL: @test7( |
308 |
| -; CHECK-NEXT: entry: |
309 |
| -; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[ENTRY_IF_END_CRIT_EDGE:%.*]] |
310 |
| -; CHECK: entry.if.end_crit_edge: |
311 |
| -; CHECK-NEXT: [[RES_PRE:%.*]] = load i32, ptr [[PTR1:%.*]], align 4 |
312 |
| -; CHECK-NEXT: br label [[IF_END:%.*]] |
313 |
| -; CHECK: if.then: |
314 |
| -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[PTR1]], i32 [[I:%.*]] |
315 |
| -; CHECK-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 |
316 |
| -; CHECK-NEXT: store i32 [[TMP]], ptr [[PTR2:%.*]], align 4 |
317 |
| -; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[I]] to i64 |
318 |
| -; CHECK-NEXT: br label [[IF_END]] |
319 |
| -; CHECK: if.end: |
320 |
| -; CHECK-NEXT: [[RES:%.*]] = phi i32 [ [[RES_PRE]], [[ENTRY_IF_END_CRIT_EDGE]] ], [ [[TMP]], [[IF_THEN]] ] |
321 |
| -; CHECK-NEXT: [[IDX:%.*]] = phi i64 [ 0, [[ENTRY_IF_END_CRIT_EDGE]] ], [ [[IDX_EXT]], [[IF_THEN]] ] |
322 |
| -; CHECK-NEXT: [[IDX_TRUNC:%.*]] = trunc i64 [[IDX]] to i32 |
323 |
| -; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[PTR1]], i32 [[IDX_TRUNC]] |
324 |
| -; CHECK-NEXT: ret i32 [[RES]] |
| 353 | +; MDEP-LABEL: @test7( |
| 354 | +; MDEP-NEXT: entry: |
| 355 | +; MDEP-NEXT: br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[ENTRY_IF_END_CRIT_EDGE:%.*]] |
| 356 | +; MDEP: entry.if.end_crit_edge: |
| 357 | +; MDEP-NEXT: [[RES_PRE:%.*]] = load i32, ptr [[PTR1:%.*]], align 4 |
| 358 | +; MDEP-NEXT: br label [[IF_END:%.*]] |
| 359 | +; MDEP: if.then: |
| 360 | +; MDEP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[PTR1]], i32 [[I:%.*]] |
| 361 | +; MDEP-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 |
| 362 | +; MDEP-NEXT: store i32 [[TMP]], ptr [[PTR2:%.*]], align 4 |
| 363 | +; MDEP-NEXT: [[IDX_EXT:%.*]] = sext i32 [[I]] to i64 |
| 364 | +; MDEP-NEXT: br label [[IF_END]] |
| 365 | +; MDEP: if.end: |
| 366 | +; MDEP-NEXT: [[RES:%.*]] = phi i32 [ [[RES_PRE]], [[ENTRY_IF_END_CRIT_EDGE]] ], [ [[TMP]], [[IF_THEN]] ] |
| 367 | +; MDEP-NEXT: [[IDX:%.*]] = phi i64 [ 0, [[ENTRY_IF_END_CRIT_EDGE]] ], [ [[IDX_EXT]], [[IF_THEN]] ] |
| 368 | +; MDEP-NEXT: [[IDX_TRUNC:%.*]] = trunc i64 [[IDX]] to i32 |
| 369 | +; MDEP-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[PTR1]], i32 [[IDX_TRUNC]] |
| 370 | +; MDEP-NEXT: ret i32 [[RES]] |
| 371 | +; |
| 372 | +; MSSA-LABEL: @test7( |
| 373 | +; MSSA-NEXT: entry: |
| 374 | +; MSSA-NEXT: br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] |
| 375 | +; MSSA: if.then: |
| 376 | +; MSSA-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[PTR1:%.*]], i32 [[I:%.*]] |
| 377 | +; MSSA-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 |
| 378 | +; MSSA-NEXT: store i32 [[TMP]], ptr [[PTR2:%.*]], align 4 |
| 379 | +; MSSA-NEXT: [[IDX_EXT:%.*]] = sext i32 [[I]] to i64 |
| 380 | +; MSSA-NEXT: br label [[IF_END]] |
| 381 | +; MSSA: if.end: |
| 382 | +; MSSA-NEXT: [[IDX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IDX_EXT]], [[IF_THEN]] ] |
| 383 | +; MSSA-NEXT: [[IDX_TRUNC:%.*]] = trunc i64 [[IDX]] to i32 |
| 384 | +; MSSA-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[PTR1]], i32 [[IDX_TRUNC]] |
| 385 | +; MSSA-NEXT: [[RES:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4 |
| 386 | +; MSSA-NEXT: ret i32 [[RES]] |
325 | 387 | ;
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326 | 388 | entry:
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327 | 389 | br i1 %cond, label %if.then, label %if.end
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