Skip to content

Commit 140aa66

Browse files
committed
[MLIR][Python] expose translate_module_to_llvmir
1 parent 097f1e7 commit 140aa66

File tree

5 files changed

+51
-1
lines changed

5 files changed

+51
-1
lines changed

mlir/include/mlir-c/Target/LLVMIR.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,9 @@ extern "C" {
3333
MLIR_CAPI_EXPORTED LLVMModuleRef
3434
mlirTranslateModuleToLLVMIR(MlirOperation module, LLVMContextRef context);
3535

36+
MLIR_CAPI_EXPORTED LLVMModuleRef
37+
mlirTranslateModuleToLLVMIRNoContext(MlirOperation module);
38+
3639
struct MlirTypeFromLLVMIRTranslator {
3740
void *ptr;
3841
};

mlir/lib/Bindings/Python/DialectLLVM.cpp

Lines changed: 14 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
1111
#include "mlir-c/Dialect/LLVM.h"
1212
#include "mlir-c/IR.h"
1313
#include "mlir-c/Support.h"
14+
#include "mlir-c/Target/LLVMIR.h"
1415
#include "mlir/Bindings/Python/Diagnostics.h"
1516
#include "mlir/Bindings/Python/Nanobind.h"
1617
#include "mlir/Bindings/Python/NanobindAdaptors.h"
@@ -24,7 +25,7 @@ using namespace mlir;
2425
using namespace mlir::python;
2526
using namespace mlir::python::nanobind_adaptors;
2627

27-
static void populateDialectLLVMSubmodule(const nanobind::module_ &m) {
28+
static void populateDialectLLVMSubmodule(nanobind::module_ &m) {
2829

2930
//===--------------------------------------------------------------------===//
3031
// StructType
@@ -154,6 +155,18 @@ static void populateDialectLLVMSubmodule(const nanobind::module_ &m) {
154155
.def_property_readonly("address_space", [](MlirType type) {
155156
return mlirLLVMPointerTypeGetAddressSpace(type);
156157
});
158+
159+
m.def(
160+
"translate_module_to_llvmir",
161+
[](MlirOperation module) {
162+
LLVMContextRef llvmCtx = LLVMContextCreate();
163+
LLVMModuleRef llvmModule = mlirTranslateModuleToLLVMIR(module, llvmCtx);
164+
char *llvmir = LLVMPrintModuleToString(llvmModule);
165+
LLVMDisposeModule(llvmModule);
166+
LLVMContextDispose(llvmCtx);
167+
return llvmir;
168+
},
169+
"module"_a, nb::rv_policy::take_ownership);
157170
}
158171

159172
NB_MODULE(_mlirDialectsLLVM, m) {

mlir/lib/CAPI/Target/LLVMIR.cpp

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,19 @@ LLVMModuleRef mlirTranslateModuleToLLVMIR(MlirOperation module,
3434
return moduleRef;
3535
}
3636

37+
LLVMModuleRef mlirTranslateModuleToLLVMIRNoContext(MlirOperation module) {
38+
Operation *moduleOp = unwrap(module);
39+
40+
LLVMContextRef context = LLVMContextCreate();
41+
llvm::LLVMContext *ctx = llvm::unwrap(context);
42+
43+
std::unique_ptr<llvm::Module> llvmModule =
44+
mlir::translateModuleToLLVMIR(moduleOp, *ctx);
45+
46+
LLVMModuleRef moduleRef = llvm::wrap(llvmModule.release());
47+
return moduleRef;
48+
}
49+
3750
DEFINE_C_API_PTR_METHODS(MlirTypeFromLLVMIRTranslator,
3851
mlir::LLVM::TypeFromLLVMIRTranslator)
3952

mlir/python/CMakeLists.txt

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -591,6 +591,8 @@ declare_mlir_python_extension(MLIRPythonExtension.Dialects.LLVM.Pybind
591591
EMBED_CAPI_LINK_LIBS
592592
MLIRCAPIIR
593593
MLIRCAPILLVM
594+
# Misnomer - this is only the LLVMIR translation target.
595+
MLIRCAPITarget
594596
)
595597

596598
declare_mlir_python_extension(MLIRPythonExtension.Dialects.Quant.Pybind

mlir/test/python/dialects/llvm.py

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -150,3 +150,22 @@ def testIntrinsics():
150150
result = llvm.intr_memset(alloca, c_0, c_128, False)
151151
# CHECK: "llvm.intr.memset"(%[[ALLOCA]], %[[CST0]], %[[CST128]]) <{isVolatile = false}> : (!llvm.ptr, i8, i32) -> ()
152152
print(result)
153+
154+
155+
# CHECK-LABEL: testTranslateToLLVMIR
156+
@constructAndPrintInModule
157+
def testTranslateToLLVMIR():
158+
with Context(), Location.unknown():
159+
module = Module.parse(
160+
"""\
161+
llvm.func @add(%arg0: i64, %arg1: i64) -> i64 {
162+
%0 = llvm.add %arg0, %arg1 : i64
163+
llvm.return %0 : i64
164+
}
165+
"""
166+
)
167+
# CHECK: define i64 @add(i64 %0, i64 %1) {
168+
# CHECK: %3 = add i64 %0, %1
169+
# CHECK: ret i64 %3
170+
# CHECK: }
171+
print(llvm.translate_module_to_llvmir(module.operation))

0 commit comments

Comments
 (0)