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Initial attemp for ADD
1 parent 8941ada commit 1423a4f

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2 files changed

+16
-2
lines changed

2 files changed

+16
-2
lines changed

llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1959,6 +1959,20 @@ unsigned GISelValueTracking::computeNumSignBits(Register R,
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break;
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}
1962+
case TargetOpcode::G_ADD: {
1963+
Register Src1 = MI.getOperand(1).getReg();
1964+
unsigned Src1NumSignBits =
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computeNumSignBits(Src1, DemandedElts, Depth + 1);
1966+
if (Src1NumSignBits != 1) {
1967+
Register Src2 = MI.getOperand(2).getReg();
1968+
unsigned Src2NumSignBits =
1969+
computeNumSignBits(Src2, DemandedElts, Depth + 1);
1970+
if (Src2NumSignBits == 1)
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return 1; // Early out.
1972+
FirstAnswer = std::min(Src1NumSignBits, Src2NumSignBits) - 1;
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}
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break;
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}
19621976
case TargetOpcode::G_FCMP:
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case TargetOpcode::G_ICMP: {
19641978
bool IsFP = Opcode == TargetOpcode::G_FCMP;

llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,7 @@ body: |
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; CHECK-NEXT: %1:_ KnownBits:00001111 SignBits:4
8383
; CHECK-NEXT: %2:_ KnownBits:0000???? SignBits:4
8484
; CHECK-NEXT: %3:_ KnownBits:11111111 SignBits:8
85-
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:1
85+
; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:3
8686
%0:_(s8) = COPY $b0
8787
%1:_(s8) = G_CONSTANT i8 15
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%2:_(s8) = G_AND %0, %1
@@ -154,7 +154,7 @@ body: |
154154
; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8
155155
; CHECK-NEXT: %4:_ KnownBits:1111111111111111 SignBits:16
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; CHECK-NEXT: %5:_ KnownBits:1111111111111111 SignBits:16
157-
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:1
157+
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:7
158158
%0:_(<4 x s16>) = COPY $d0
159159
%1:_(s16) = G_CONSTANT i16 255
160160
%2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1

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