@@ -2629,7 +2629,7 @@ SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) {
26292629
26302630 // Finally, if this value fits in a 5 bit sext field, return it
26312631 if (SignExtend32<5>(MaskVal) == MaskVal)
2632- return DAG.getTargetConstant (MaskVal, SDLoc(N), MVT::i32);
2632+ return DAG.getSignedTargetConstant (MaskVal, SDLoc(N), MVT::i32);
26332633 return SDValue();
26342634}
26352635
@@ -2817,7 +2817,7 @@ bool PPCTargetLowering::SelectAddressRegImm(
28172817 int16_t imm = 0;
28182818 if (isIntS16Immediate(N.getOperand(1), imm) &&
28192819 (!EncodingAlignment || isAligned(*EncodingAlignment, imm))) {
2820- Disp = DAG.getTargetConstant (imm, dl, N.getValueType());
2820+ Disp = DAG.getSignedTargetConstant (imm, dl, N.getValueType());
28212821 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) {
28222822 Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
28232823 fixupFuncForFI(DAG, FI->getIndex(), N.getValueType());
@@ -5181,7 +5181,7 @@ static SDNode *isBLACompatibleAddress(SDValue Op, SelectionDAG &DAG) {
51815181 return nullptr; // Top 6 bits have to be sext of immediate.
51825182
51835183 return DAG
5184- .getConstant (
5184+ .getSignedConstant (
51855185 (int)C->getZExtValue() >> 2, SDLoc(Op),
51865186 DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout()))
51875187 .getNode();
@@ -9358,7 +9358,11 @@ static SDValue getCanonicalConstSplat(uint64_t Val, unsigned SplatSize, EVT VT,
93589358 EVT CanonicalVT = VTys[SplatSize-1];
93599359
93609360 // Build a canonical splat for this value.
9361- return DAG.getBitcast(ReqVT, DAG.getConstant(Val, dl, CanonicalVT));
9361+ // Explicitly truncate APInt here, as this API is used with a mix of
9362+ // signed and unsigned values.
9363+ return DAG.getBitcast(
9364+ ReqVT,
9365+ DAG.getConstant(APInt(64, Val).trunc(SplatSize * 8), dl, CanonicalVT));
93629366}
93639367
93649368/// BuildIntrinsicOp - Return a unary operator intrinsic node with the
@@ -9769,7 +9773,7 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
97699773 // To avoid having these optimizations undone by constant folding,
97709774 // we convert to a pseudo that will be expanded later into one of
97719775 // the above forms.
9772- SDValue Elt = DAG.getConstant (SextVal, dl, MVT::i32);
9776+ SDValue Elt = DAG.getSignedConstant (SextVal, dl, MVT::i32);
97739777 EVT VT = (SplatSize == 1 ? MVT::v16i8 :
97749778 (SplatSize == 2 ? MVT::v8i16 : MVT::v4i32));
97759779 SDValue EltSize = DAG.getConstant(SplatSize, dl, MVT::i32);
@@ -18964,7 +18968,7 @@ PPC::AddrMode PPCTargetLowering::SelectOptimalAddrMode(const SDNode *Parent,
1896418968 (!Align || isAligned(*Align, CNImm))) {
1896518969 int32_t Addr = (int32_t)CNImm;
1896618970 // Otherwise, break this down into LIS + Disp.
18967- Disp = DAG.getTargetConstant ((int16_t)Addr, DL, MVT::i32);
18971+ Disp = DAG.getSignedTargetConstant ((int16_t)Addr, DL, MVT::i32);
1896818972 Base =
1896918973 DAG.getTargetConstant((Addr - (int16_t)Addr) >> 16, DL, MVT::i32);
1897018974 uint32_t LIS = CNType == MVT::i32 ? PPC::LIS : PPC::LIS8;
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