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readded 64 bit test
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clang/test/CodeGenHLSL/builtins/WaveActiveBitOr.hlsl

Lines changed: 12 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -6,17 +6,24 @@
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// RUN: spirv-pc-vulkan-compute %s -emit-llvm -disable-llvm-passes -o - | \
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// RUN: FileCheck %s --check-prefixes=CHECK,SPVCHECK
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// DXCHECK: define hidden [[FN_TYPE:]]noundef i1 @
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// SPVCHECK: define hidden [[FN_TYPE:spir_func ]]noundef i1 @
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// Test basic lowering to runtime function call.
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// CHECK-LABEL: test_uint
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uint test_uint(uint expr) {
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// DXCHECK: %[[RET:.*]] = call i1 [[TY:.*]] @llvm.[[ICF:dx]].wave.reduce.or.i32([[TY]] %[[#]])
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// SPVCHECK: %[[RET:.*]] = call i1 [[TY:.*]] @llvm.[[ICF:spv]].wave.reduce.or.i32([[TY]] %[[#]])
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// DXCHECK: %[[RET:.*]] = call [[TY:.*]] @llvm.[[ICF:dx]].wave.reduce.or.i32([[TY]] %[[#]])
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// SPVCHECK: %[[RET:.*]] = call [[TY:.*]] @llvm.[[ICF:spv]].wave.reduce.or.i32([[TY]] %[[#]])
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// CHECK: ret [[TY]] %[[RET]]
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return WaveActiveBitOr(expr);
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}
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// CHECK: declare [[TY]] @llvm.[[ICF]].wave.reduce.or.i32([[TY]]) #[[#attr:]]
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// CHECK-LABEL: test_uint64_t
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uint64_t test_uint64_t(uint64_t expr) {
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// DXCHECK: %[[RET:.*]] = call [[TY:.*]] @llvm.[[ICF:dx]].wave.reduce.or.i64([[TY]] %[[#]])
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// SPVCHECK: %[[RET:.*]] = call [[TY:.*]] @llvm.[[ICF:spv]].wave.reduce.or.i64([[TY]] %[[#]])
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// CHECK: ret [[TY]] %[[RET]]
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return WaveActiveBitOr(expr);
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}
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// CHECK: declare [[TY]] @llvm.[[ICF]].wave.reduce.or.i64([[TY]]) #[[#attr:]]

llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -182,6 +182,8 @@ bool AArch64FunctionInfo::shouldSignReturnAddress(SignReturnAddress Condition,
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return IsLRSpilled;
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case SignReturnAddress::All:
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return true;
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default:
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return false;
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}
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}
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