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[TargetLowering] Store Context in variable (NFC)
Avoid repeating CLI.RetTy->getContext() many times.
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+17
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llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 17 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -10981,6 +10981,8 @@ static AttributeList getReturnAttrs(TargetLowering::CallLoweringInfo &CLI) {
1098110981
/// migrated to using LowerCall, this hook should be integrated into SDISel.
1098210982
std::pair<SDValue, SDValue>
1098310983
TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
10984+
LLVMContext &Context = CLI.RetTy->getContext();
10985+
1098410986
// Handle the incoming return values from the call.
1098510987
CLI.Ins.clear();
1098610988
SmallVector<Type *, 4> RetOrigTys;
@@ -11004,8 +11006,8 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1100411006
for (size_t i = 0, e = OldRetTys.size(); i != e; ++i) {
1100511007
EVT RetVT = OldRetTys[i];
1100611008
uint64_t Offset = OldOffsets[i];
11007-
MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT);
11008-
unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), RetVT);
11009+
MVT RegisterVT = getRegisterType(Context, RetVT);
11010+
unsigned NumRegs = getNumRegisters(Context, RetVT);
1100911011
unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits() / 8;
1101011012
RetOrigTys.append(NumRegs, OldRetOrigTys[i]);
1101111013
RetTys.append(NumRegs, RegisterVT);
@@ -11019,7 +11021,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1101911021

1102011022
bool CanLowerReturn =
1102111023
this->CanLowerReturn(CLI.CallConv, CLI.DAG.getMachineFunction(),
11022-
CLI.IsVarArg, Outs, CLI.RetTy->getContext(), CLI.RetTy);
11024+
CLI.IsVarArg, Outs, Context, CLI.RetTy);
1102311025

1102411026
SDValue DemoteStackSlot;
1102511027
int DemoteStackIdx = -100;
@@ -11032,8 +11034,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1103211034
MachineFunction &MF = CLI.DAG.getMachineFunction();
1103311035
DemoteStackIdx =
1103411036
MF.getFrameInfo().CreateStackObject(TySize, Alignment, false);
11035-
Type *StackSlotPtrType =
11036-
PointerType::get(CLI.RetTy->getContext(), DL.getAllocaAddrSpace());
11037+
Type *StackSlotPtrType = PointerType::get(Context, DL.getAllocaAddrSpace());
1103711038

1103811039
DemoteStackSlot = CLI.DAG.getFrameIndex(DemoteStackIdx, getFrameIndexTy(DL));
1103911040
ArgListEntry Entry;
@@ -11055,7 +11056,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1105511056
CLI.getArgs().insert(CLI.getArgs().begin(), Entry);
1105611057
CLI.NumFixedArgs += 1;
1105711058
CLI.getArgs()[0].IndirectType = CLI.RetTy;
11058-
CLI.RetTy = Type::getVoidTy(CLI.RetTy->getContext());
11059+
CLI.RetTy = Type::getVoidTy(Context);
1105911060

1106011061
// sret demotion isn't compatible with tail-calls, since the sret argument
1106111062
// points into the callers stack frame.
@@ -11071,10 +11072,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1107111072
Flags.setInConsecutiveRegsLast();
1107211073
}
1107311074
EVT VT = RetTys[I];
11074-
MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
11075-
CLI.CallConv, VT);
11076-
unsigned NumRegs = getNumRegistersForCallingConv(CLI.RetTy->getContext(),
11077-
CLI.CallConv, VT);
11075+
MVT RegisterVT = getRegisterTypeForCallingConv(Context, CLI.CallConv, VT);
11076+
unsigned NumRegs =
11077+
getNumRegistersForCallingConv(Context, CLI.CallConv, VT);
1107811078
for (unsigned i = 0; i != NumRegs; ++i) {
1107911079
ISD::InputArg Ret(Flags, RegisterVT, VT, RetOrigTys[I],
1108011080
CLI.IsReturnValueUsed, ISD::InputArg::NoArgIndex, 0);
@@ -11102,7 +11102,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1110211102
ISD::ArgFlagsTy Flags;
1110311103
Flags.setSwiftError();
1110411104
ISD::InputArg Ret(Flags, getPointerTy(DL), EVT(getPointerTy(DL)),
11105-
PointerType::getUnqual(CLI.RetTy->getContext()),
11105+
PointerType::getUnqual(Context),
1110611106
/*Used=*/true, ISD::InputArg::NoArgIndex, 0);
1110711107
CLI.Ins.push_back(Ret);
1110811108
}
@@ -11213,10 +11213,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1121311213
if (NeedsRegBlock)
1121411214
Flags.setInConsecutiveRegs();
1121511215

11216-
MVT PartVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
11217-
CLI.CallConv, VT);
11218-
unsigned NumParts = getNumRegistersForCallingConv(CLI.RetTy->getContext(),
11219-
CLI.CallConv, VT);
11216+
MVT PartVT = getRegisterTypeForCallingConv(Context, CLI.CallConv, VT);
11217+
unsigned NumParts =
11218+
getNumRegistersForCallingConv(Context, CLI.CallConv, VT);
1122011219
SmallVector<SDValue, 4> Parts(NumParts);
1122111220
ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
1122211221

@@ -11346,10 +11345,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1134611345
AssertOp = ISD::AssertZext;
1134711346
unsigned CurReg = 0;
1134811347
for (EVT VT : RetTys) {
11349-
MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
11350-
CLI.CallConv, VT);
11351-
unsigned NumRegs = getNumRegistersForCallingConv(CLI.RetTy->getContext(),
11352-
CLI.CallConv, VT);
11348+
MVT RegisterVT = getRegisterTypeForCallingConv(Context, CLI.CallConv, VT);
11349+
unsigned NumRegs =
11350+
getNumRegistersForCallingConv(Context, CLI.CallConv, VT);
1135311351

1135411352
ReturnValues.push_back(getCopyFromParts(
1135511353
CLI.DAG, CLI.DL, &InVals[CurReg], NumRegs, RegisterVT, VT, nullptr,

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