@@ -10981,6 +10981,8 @@ static AttributeList getReturnAttrs(TargetLowering::CallLoweringInfo &CLI) {
10981
10981
// / migrated to using LowerCall, this hook should be integrated into SDISel.
10982
10982
std::pair<SDValue, SDValue>
10983
10983
TargetLowering::LowerCallTo (TargetLowering::CallLoweringInfo &CLI) const {
10984
+ LLVMContext &Context = CLI.RetTy ->getContext ();
10985
+
10984
10986
// Handle the incoming return values from the call.
10985
10987
CLI.Ins .clear ();
10986
10988
SmallVector<Type *, 4 > RetOrigTys;
@@ -11004,8 +11006,8 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
11004
11006
for (size_t i = 0 , e = OldRetTys.size (); i != e; ++i) {
11005
11007
EVT RetVT = OldRetTys[i];
11006
11008
uint64_t Offset = OldOffsets[i];
11007
- MVT RegisterVT = getRegisterType(CLI.RetTy->getContext() , RetVT);
11008
- unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext() , RetVT);
11009
+ MVT RegisterVT = getRegisterType (Context , RetVT);
11010
+ unsigned NumRegs = getNumRegisters (Context , RetVT);
11009
11011
unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits () / 8 ;
11010
11012
RetOrigTys.append (NumRegs, OldRetOrigTys[i]);
11011
11013
RetTys.append (NumRegs, RegisterVT);
@@ -11019,7 +11021,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
11019
11021
11020
11022
bool CanLowerReturn =
11021
11023
this ->CanLowerReturn (CLI.CallConv , CLI.DAG .getMachineFunction (),
11022
- CLI.IsVarArg, Outs, CLI.RetTy->getContext() , CLI.RetTy);
11024
+ CLI.IsVarArg , Outs, Context , CLI.RetTy );
11023
11025
11024
11026
SDValue DemoteStackSlot;
11025
11027
int DemoteStackIdx = -100 ;
@@ -11032,8 +11034,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
11032
11034
MachineFunction &MF = CLI.DAG .getMachineFunction ();
11033
11035
DemoteStackIdx =
11034
11036
MF.getFrameInfo ().CreateStackObject (TySize, Alignment, false );
11035
- Type *StackSlotPtrType =
11036
- PointerType::get(CLI.RetTy->getContext(), DL.getAllocaAddrSpace());
11037
+ Type *StackSlotPtrType = PointerType::get (Context, DL.getAllocaAddrSpace ());
11037
11038
11038
11039
DemoteStackSlot = CLI.DAG .getFrameIndex (DemoteStackIdx, getFrameIndexTy (DL));
11039
11040
ArgListEntry Entry;
@@ -11055,7 +11056,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
11055
11056
CLI.getArgs ().insert (CLI.getArgs ().begin (), Entry);
11056
11057
CLI.NumFixedArgs += 1 ;
11057
11058
CLI.getArgs ()[0 ].IndirectType = CLI.RetTy ;
11058
- CLI.RetTy = Type::getVoidTy(CLI.RetTy->getContext() );
11059
+ CLI.RetTy = Type::getVoidTy (Context );
11059
11060
11060
11061
// sret demotion isn't compatible with tail-calls, since the sret argument
11061
11062
// points into the callers stack frame.
@@ -11071,10 +11072,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
11071
11072
Flags.setInConsecutiveRegsLast ();
11072
11073
}
11073
11074
EVT VT = RetTys[I];
11074
- MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
11075
- CLI.CallConv, VT);
11076
- unsigned NumRegs = getNumRegistersForCallingConv(CLI.RetTy->getContext(),
11077
- CLI.CallConv, VT);
11075
+ MVT RegisterVT = getRegisterTypeForCallingConv (Context, CLI.CallConv , VT);
11076
+ unsigned NumRegs =
11077
+ getNumRegistersForCallingConv (Context, CLI.CallConv , VT);
11078
11078
for (unsigned i = 0 ; i != NumRegs; ++i) {
11079
11079
ISD::InputArg Ret (Flags, RegisterVT, VT, RetOrigTys[I],
11080
11080
CLI.IsReturnValueUsed , ISD::InputArg::NoArgIndex, 0 );
@@ -11102,7 +11102,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
11102
11102
ISD::ArgFlagsTy Flags;
11103
11103
Flags.setSwiftError ();
11104
11104
ISD::InputArg Ret (Flags, getPointerTy (DL), EVT (getPointerTy (DL)),
11105
- PointerType::getUnqual(CLI.RetTy->getContext() ),
11105
+ PointerType::getUnqual (Context ),
11106
11106
/* Used=*/ true , ISD::InputArg::NoArgIndex, 0 );
11107
11107
CLI.Ins .push_back (Ret);
11108
11108
}
@@ -11213,10 +11213,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
11213
11213
if (NeedsRegBlock)
11214
11214
Flags.setInConsecutiveRegs ();
11215
11215
11216
- MVT PartVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
11217
- CLI.CallConv, VT);
11218
- unsigned NumParts = getNumRegistersForCallingConv(CLI.RetTy->getContext(),
11219
- CLI.CallConv, VT);
11216
+ MVT PartVT = getRegisterTypeForCallingConv (Context, CLI.CallConv , VT);
11217
+ unsigned NumParts =
11218
+ getNumRegistersForCallingConv (Context, CLI.CallConv , VT);
11220
11219
SmallVector<SDValue, 4 > Parts (NumParts);
11221
11220
ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
11222
11221
@@ -11346,10 +11345,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
11346
11345
AssertOp = ISD::AssertZext;
11347
11346
unsigned CurReg = 0 ;
11348
11347
for (EVT VT : RetTys) {
11349
- MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),
11350
- CLI.CallConv, VT);
11351
- unsigned NumRegs = getNumRegistersForCallingConv(CLI.RetTy->getContext(),
11352
- CLI.CallConv, VT);
11348
+ MVT RegisterVT = getRegisterTypeForCallingConv (Context, CLI.CallConv , VT);
11349
+ unsigned NumRegs =
11350
+ getNumRegistersForCallingConv (Context, CLI.CallConv , VT);
11353
11351
11354
11352
ReturnValues.push_back (getCopyFromParts (
11355
11353
CLI.DAG , CLI.DL , &InVals[CurReg], NumRegs, RegisterVT, VT, nullptr ,
0 commit comments