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1 parent 608f957 commit 17bd924Copy full SHA for 17bd924
llvm/test/CodeGen/X86/apx/memfold-nd2rmw.mir
@@ -4,7 +4,7 @@
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# below show be morphed into an ADD32mi by the register allocator, making it
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# load-operate-store to %stack.2.
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#
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-# CHECK: MOV32mi %stack.2
+# CHECK: ADD32mi %stack.2
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--- |
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define fastcc void @add32ri_nd_2_add32mi(i1 %arg, i1 %arg1, i1 %arg2, ptr %arg3, ptr %arg4, i1 %arg5, i8 %arg6) #0 {
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