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the test is now not failing, but the isfloat check does not work
1 parent 23a0570 commit 180d470

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4 files changed

+14
-13
lines changed

4 files changed

+14
-13
lines changed

llvm/lib/CodeGen/LowLevelTypeUtils.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ LLT llvm::getLLTForType(Type &Ty, const DataLayout &DL) {
2727
}
2828

2929
if (auto PTy = dyn_cast<PointerType>(&Ty)) {
30-
unsigned AddrSpace = PTy->isTokenTy();
30+
unsigned AddrSpace = PTy->getAddressSpace();
3131
return LLT::pointer(AddrSpace, DL.getPointerSizeInBits(AddrSpace));
3232
}
3333

llvm/lib/CodeGenTypes/LowLevelType.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ LLT::LLT(MVT VT) {
2727
// concerned.
2828
MVT ElemVT = VT.getVectorElementType();
2929
bool isElemBfloat = (ElemVT == MVT::bf16);
30-
init(/*IsPointer=*/false, /*IsVector=*/false, /*IsScalar=*/true, /*isBfloat=*/isElemBfloat,
30+
init(/*IsPointer=*/false, /*IsVector=*/false, /*IsScalar=*/true, /*isBfloat=*/false,
3131
ElementCount::getFixed(0), VT.getSizeInBits(), /*AddressSpace=*/0);
3232
} else {
3333
IsScalar = false;

llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1262,16 +1262,16 @@ void addInstrRequirements(const MachineInstr &MI,
12621262
break;
12631263
}
12641264
case SPIRV::OpTypeFloat: {
1265-
// const MachineBasicBlock *MBB = MI.getParent();
1266-
// const MachineFunction *MF = MBB->getParent();
1267-
// const MachineRegisterInfo &MRI = MF->getRegInfo();
1268-
// const MachineOperand &MO = MI.getOperand(1);
1269-
// if (MO.isReg()) {
1270-
// LLT Ty = MRI.getType(MO.getReg());
1271-
// if(!Ty.isScalar()) {
1272-
// assert(1 && "hola, ur wrong");
1273-
// }
1274-
// }
1265+
const MachineBasicBlock *MBB = MI.getParent();
1266+
const MachineFunction *MF = MBB->getParent();
1267+
const MachineRegisterInfo &MRI = MF->getRegInfo();
1268+
const MachineOperand &MO = MI.getOperand(1);
1269+
if (MO.isReg()) {
1270+
LLT Ty = MRI.getType(MO.getReg());
1271+
if(Ty.isBfloat()) {
1272+
assert(1 && "hola, ur wrong");
1273+
}
1274+
}
12751275

12761276
unsigned BitWidth = MI.getOperand(1).getImm();
12771277
if (BitWidth == 64)

llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bfloat16/bfloat16.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,5 +12,6 @@
1212

1313
define spir_kernel void @test() {
1414
entry:
15+
%addr1 = alloca bfloat
1516
ret void
16-
}
17+
}

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