@@ -329,19 +329,6 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
329329 OpdsMapping[2 ] = GPRValueMapping;
330330 OpdsMapping[3 ] = GPRValueMapping;
331331 break ;
332- case TargetOpcode::G_FMA: {
333- LLT Ty = MRI.getType (MI.getOperand (0 ).getReg ());
334- std::fill_n (OpdsMapping.begin (), 4 , getFPValueMapping (Ty.getSizeInBits ()));
335- break ;
336- }
337- case TargetOpcode::G_FPEXT:
338- case TargetOpcode::G_FPTRUNC: {
339- LLT ToTy = MRI.getType (MI.getOperand (0 ).getReg ());
340- LLT FromTy = MRI.getType (MI.getOperand (1 ).getReg ());
341- OpdsMapping[0 ] = getFPValueMapping (ToTy.getSizeInBits ());
342- OpdsMapping[1 ] = getFPValueMapping (FromTy.getSizeInBits ());
343- break ;
344- }
345332 case TargetOpcode::G_FPTOSI:
346333 case TargetOpcode::G_FPTOUI: {
347334 LLT Ty = MRI.getType (MI.getOperand (1 ).getReg ());
@@ -356,11 +343,6 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
356343 OpdsMapping[1 ] = GPRValueMapping;
357344 break ;
358345 }
359- case TargetOpcode::G_FCONSTANT: {
360- LLT Ty = MRI.getType (MI.getOperand (0 ).getReg ());
361- OpdsMapping[0 ] = getFPValueMapping (Ty.getSizeInBits ());
362- break ;
363- }
364346 case TargetOpcode::G_FCMP: {
365347 LLT Ty = MRI.getType (MI.getOperand (2 ).getReg ());
366348
@@ -375,9 +357,16 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
375357 // By default map all scalars to GPR.
376358 for (unsigned Idx = 0 ; Idx < NumOperands; ++Idx) {
377359 auto &MO = MI.getOperand (Idx);
378- if (!MO.isReg ())
360+ if (!MO.isReg () || !MO.getReg ())
361+ continue ;
362+ LLT Ty = MRI.getType (MO.getReg ());
363+ if (!Ty.isValid ())
379364 continue ;
380- OpdsMapping[Idx] = GPRValueMapping;
365+
366+ if (isPreISelGenericFloatingPointOpcode (Opc))
367+ OpdsMapping[Idx] = getFPValueMapping (Ty.getSizeInBits ());
368+ else
369+ OpdsMapping[Idx] = GPRValueMapping;
381370 }
382371 break ;
383372 }
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