11// RUN: mlir-translate -no-implicit-module -test-spirv-roundtrip-debug -mlir-print-debuginfo -mlir-print-local-scope %s | FileCheck %s
2+ // RUN: %if spirv-tools %{ mlir-translate --no-implicit-module --serialize-spirv %s | spirv-val %}
23
3- spirv.module Logical GLSL450 requires #spirv.vce <v1.0 , [Shader ], []> {
4- // CHECK: loc({{".*debug.mlir"}}:5 :3)
4+ spirv.module Logical GLSL450 requires #spirv.vce <v1.3 , [Shader , GroupNonUniformArithmetic ], [SPV_KHR_non_semantic_info , SPV_KHR_storage_buffer_storage_class ]> attributes { spirv.target_env = #spirv.target_env < #spirv.vce < v1.3 , [ Shader , GroupNonUniformArithmetic ], [ SPV_KHR_non_semantic_info , SPV_KHR_storage_buffer_storage_class ]>, #spirv.resource_limits <>>} {
5+ // CHECK: loc({{".*debug.mlir"}}:6 :3)
56 spirv.GlobalVariable @var0 bind (0 , 1 ) : !spirv.ptr <f32 , Input >
67 spirv.func @arithmetic (%arg0 : vector <4 xf32 >, %arg1 : vector <4 xf32 >) " None" {
7- // CHECK: loc({{".*debug.mlir"}}:8 :10)
8+ // CHECK: loc({{".*debug.mlir"}}:9 :10)
89 %0 = spirv.FAdd %arg0 , %arg1 : vector <4 xf32 >
9- // CHECK: loc({{".*debug.mlir"}}:10 :10)
10+ // CHECK: loc({{".*debug.mlir"}}:11 :10)
1011 %1 = spirv.FNegate %arg0 : vector <4 xf32 >
1112 spirv.Return
1213 }
1314
1415 spirv.func @atomic (%ptr: !spirv.ptr <i32 , Workgroup >, %value: i32 , %comparator: i32 ) " None" {
15- // CHECK: loc({{".*debug.mlir"}}:16 :10)
16+ // CHECK: loc({{".*debug.mlir"}}:17 :10)
1617 %1 = spirv.AtomicAnd <Device > <None > %ptr , %value : !spirv.ptr <i32 , Workgroup >
1718 spirv.Return
1819 }
1920
2021 spirv.func @bitwiser (%arg0 : i32 , %arg1 : i32 ) " None" {
21- // CHECK: loc({{".*debug.mlir"}}:22 :10)
22+ // CHECK: loc({{".*debug.mlir"}}:23 :10)
2223 %0 = spirv.BitwiseAnd %arg0 , %arg1 : i32
2324 spirv.Return
2425 }
2526
2627 spirv.func @convert (%arg0 : f32 ) " None" {
27- // CHECK: loc({{".*debug.mlir"}}:28 :10)
28+ // CHECK: loc({{".*debug.mlir"}}:29 :10)
2829 %0 = spirv.ConvertFToU %arg0 : f32 to i32
2930 spirv.Return
3031 }
3132
3233 spirv.func @composite (%arg0 : !spirv.struct <(f32 , !spirv.struct <(!spirv.array <4 xf32 >, f32 )>)>, %arg1: !spirv.array <4 xf32 >, %arg2 : f32 , %arg3 : f32 ) " None" {
33- // CHECK: loc({{".*debug.mlir"}}:34 :10)
34+ // CHECK: loc({{".*debug.mlir"}}:35 :10)
3435 %0 = spirv.CompositeInsert %arg1 , %arg0 [1 : i32 , 0 : i32 ] : !spirv.array <4 xf32 > into !spirv.struct <(f32 , !spirv.struct <(!spirv.array <4 xf32 >, f32 )>)>
35- // CHECK: loc({{".*debug.mlir"}}:36 :10)
36+ // CHECK: loc({{".*debug.mlir"}}:37 :10)
3637 %1 = spirv.CompositeConstruct %arg2 , %arg3 : (f32 , f32 ) -> vector <2 xf32 >
3738 spirv.Return
3839 }
3940
4041 spirv.func @group_non_uniform (%val: f32 ) " None" {
41- // CHECK: loc({{".*debug.mlir"}}:42 :10)
42+ // CHECK: loc({{".*debug.mlir"}}:43 :10)
4243 %0 = spirv.GroupNonUniformFAdd <Workgroup > <Reduce > %val : f32 -> f32
4344 spirv.Return
4445 }
4546
4647 spirv.func @local_var () " None" {
4748 %zero = spirv.Constant 0 : i32
48- // CHECK: loc({{".*debug.mlir"}}:49 :12)
49+ // CHECK: loc({{".*debug.mlir"}}:50 :12)
4950 %var = spirv.Variable init (%zero ) : !spirv.ptr <i32 , Function >
5051 spirv.Return
5152 }
5253
5354 spirv.func @logical (%arg0: i32 , %arg1: i32 ) " None" {
54- // CHECK: loc({{".*debug.mlir"}}:55 :10)
55+ // CHECK: loc({{".*debug.mlir"}}:56 :10)
5556 %0 = spirv.IEqual %arg0 , %arg1 : i32
5657 spirv.Return
5758 }
5859
5960 spirv.func @memory_accesses (%arg0 : !spirv.ptr <!spirv.array <4 x!spirv.array <4 xf32 >>, StorageBuffer >, %arg1 : i32 , %arg2 : i32 ) " None" {
60- // CHECK: loc({{".*debug.mlir"}}:61 :10)
61+ // CHECK: loc({{".*debug.mlir"}}:62 :10)
6162 %2 = spirv.AccessChain %arg0 [%arg1 , %arg2 ] : !spirv.ptr <!spirv.array <4 x!spirv.array <4 xf32 >>, StorageBuffer >, i32 , i32 -> !spirv.ptr <f32 , StorageBuffer >
62- // CHECK: loc({{".*debug.mlir"}}:63 :10)
63+ // CHECK: loc({{".*debug.mlir"}}:64 :10)
6364 %3 = spirv.Load " StorageBuffer" %2 : f32
64- // CHECK: loc({{.*debug.mlir"}}:65 :5)
65+ // CHECK: loc({{.*debug.mlir"}}:66 :5)
6566 spirv.Store " StorageBuffer" %2 , %3 : f32
66- // CHECK: loc({{".*debug.mlir"}}:67 :5)
67+ // CHECK: loc({{".*debug.mlir"}}:68 :5)
6768 spirv.Return
6869 }
6970
@@ -73,49 +74,49 @@ spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
7374 %ivar = spirv.Variable init (%zero ) : !spirv.ptr <i32 , Function >
7475 %jvar = spirv.Variable init (%zero ) : !spirv.ptr <i32 , Function >
7576 spirv.mlir.loop {
76- // CHECK: loc({{".*debug.mlir"}}:75 :5)
77+ // CHECK: loc({{".*debug.mlir"}}:76 :5)
7778 spirv.Branch ^header
7879 ^header :
7980 %ival0 = spirv.Load " Function" %ivar : i32
8081 %icmp = spirv.SLessThan %ival0 , %count : i32
81- // CHECK: loc({{".*debug.mlir"}}:75 :5)
82+ // CHECK: loc({{".*debug.mlir"}}:76 :5)
8283 spirv.BranchConditional %icmp , ^body , ^merge
8384 ^body :
8485 spirv.Store " Function" %jvar , %zero : i32
8586 spirv.mlir.loop {
86- // CHECK: loc({{".*debug.mlir"}}:85 :7)
87+ // CHECK: loc({{".*debug.mlir"}}:86 :7)
8788 spirv.Branch ^header
8889 ^header :
8990 %jval0 = spirv.Load " Function" %jvar : i32
9091 %jcmp = spirv.SLessThan %jval0 , %count : i32
91- // CHECK: loc({{".*debug.mlir"}}:85 :7)
92+ // CHECK: loc({{".*debug.mlir"}}:86 :7)
9293 spirv.BranchConditional %jcmp , ^body , ^merge
9394 ^body :
94- // CHECK: loc({{".*debug.mlir"}}:95 :9)
95+ // CHECK: loc({{".*debug.mlir"}}:96 :9)
9596 spirv.Branch ^continue
9697 ^continue :
9798 %jval1 = spirv.Load " Function" %jvar : i32
9899 %add = spirv.IAdd %jval1 , %one : i32
99100 spirv.Store " Function" %jvar , %add : i32
100- // CHECK: loc({{".*debug.mlir"}}:101 :9)
101+ // CHECK: loc({{".*debug.mlir"}}:102 :9)
101102 spirv.Branch ^header
102103 ^merge :
103- // CHECK: loc({{".*debug.mlir"}}:85 :7)
104+ // CHECK: loc({{".*debug.mlir"}}:86 :7)
104105 spirv.mlir.merge
105- // CHECK: loc({{".*debug.mlir"}}:85 :7)
106+ // CHECK: loc({{".*debug.mlir"}}:86 :7)
106107 }
107- // CHECK: loc({{".*debug.mlir"}}:108 :7)
108+ // CHECK: loc({{".*debug.mlir"}}:109 :7)
108109 spirv.Branch ^continue
109110 ^continue :
110111 %ival1 = spirv.Load " Function" %ivar : i32
111112 %add = spirv.IAdd %ival1 , %one : i32
112113 spirv.Store " Function" %ivar , %add : i32
113- // CHECK: loc({{".*debug.mlir"}}:114 :7)
114+ // CHECK: loc({{".*debug.mlir"}}:115 :7)
114115 spirv.Branch ^header
115116 ^merge :
116- // CHECK: loc({{".*debug.mlir"}}:75 :5)
117+ // CHECK: loc({{".*debug.mlir"}}:76 :5)
117118 spirv.mlir.merge
118- // CHECK: loc({{".*debug.mlir"}}:75 :5)
119+ // CHECK: loc({{".*debug.mlir"}}:76 :5)
119120 }
120121 spirv.Return
121122 }
@@ -126,21 +127,23 @@ spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
126127 %two = spirv.Constant 2 : i32
127128 %var = spirv.Variable init (%zero ) : !spirv.ptr <i32 , Function >
128129 spirv.mlir.selection {
129- // CHECK: loc({{".*debug.mlir"}}:128 :5)
130+ // CHECK: loc({{".*debug.mlir"}}:129 :5)
130131 spirv.BranchConditional %cond [5 , 10 ], ^then , ^else
131132 ^then :
132133 spirv.Store " Function" %var , %one : i32
133- // CHECK: loc({{".*debug.mlir"}}:134 :7)
134+ // CHECK: loc({{".*debug.mlir"}}:135 :7)
134135 spirv.Branch ^merge
135136 ^else :
136137 spirv.Store " Function" %var , %two : i32
137- // CHECK: loc({{".*debug.mlir"}}:138 :7)
138+ // CHECK: loc({{".*debug.mlir"}}:139 :7)
138139 spirv.Branch ^merge
139140 ^merge :
140- // CHECK: loc({{".*debug.mlir"}}:128 :5)
141+ // CHECK: loc({{".*debug.mlir"}}:129 :5)
141142 spirv.mlir.merge
142- // CHECK: loc({{".*debug.mlir"}}:128 :5)
143+ // CHECK: loc({{".*debug.mlir"}}:129 :5)
143144 }
144145 spirv.Return
145146 }
147+
148+ spirv.EntryPoint " GLCompute" @local_var
146149}
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