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arsenmarsenm
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AMDGPU: Fix returning wrong type for stack passed sub-dword arguments (#158002)
Fixes assertion with -debug-only=isel on LowerFormalArguments result. That assert really shouldn't be under LLVM_DEBUG. Fixes #157997
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3 files changed

+325
-27
lines changed

3 files changed

+325
-27
lines changed

‎llvm/lib/Target/AMDGPU/SIISelLowering.cpp‎

Lines changed: 39 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -2359,6 +2359,37 @@ SDValue SITargetLowering::lowerKernargMemParameter(
23592359
return DAG.getMergeValues({Val, Load.getValue(1)}, SL);
23602360
}
23612361

2362+
/// Coerce an argument which was passed in a different ABI type to the original
2363+
/// expected value type.
2364+
SDValue SITargetLowering::convertABITypeToValueType(SelectionDAG &DAG,
2365+
SDValue Val,
2366+
CCValAssign &VA,
2367+
const SDLoc &SL) const {
2368+
EVT ValVT = VA.getValVT();
2369+
2370+
// If this is an 8 or 16-bit value, it is really passed promoted
2371+
// to 32 bits. Insert an assert[sz]ext to capture this, then
2372+
// truncate to the right size.
2373+
switch (VA.getLocInfo()) {
2374+
case CCValAssign::Full:
2375+
return Val;
2376+
case CCValAssign::BCvt:
2377+
return DAG.getNode(ISD::BITCAST, SL, ValVT, Val);
2378+
case CCValAssign::SExt:
2379+
Val = DAG.getNode(ISD::AssertSext, SL, VA.getLocVT(), Val,
2380+
DAG.getValueType(ValVT));
2381+
return DAG.getNode(ISD::TRUNCATE, SL, ValVT, Val);
2382+
case CCValAssign::ZExt:
2383+
Val = DAG.getNode(ISD::AssertZext, SL, VA.getLocVT(), Val,
2384+
DAG.getValueType(ValVT));
2385+
return DAG.getNode(ISD::TRUNCATE, SL, ValVT, Val);
2386+
case CCValAssign::AExt:
2387+
return DAG.getNode(ISD::TRUNCATE, SL, ValVT, Val);
2388+
default:
2389+
llvm_unreachable("Unknown loc info!");
2390+
}
2391+
}
2392+
23622393
SDValue SITargetLowering::lowerStackParameter(SelectionDAG &DAG,
23632394
CCValAssign &VA, const SDLoc &SL,
23642395
SDValue Chain,
@@ -2379,7 +2410,6 @@ SDValue SITargetLowering::lowerStackParameter(SelectionDAG &DAG,
23792410

23802411
// Create load nodes to retrieve arguments from the stack.
23812412
SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
2382-
SDValue ArgValue;
23832413

23842414
// For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT)
23852415
ISD::LoadExtType ExtType = ISD::NON_EXTLOAD;
@@ -2402,10 +2432,15 @@ SDValue SITargetLowering::lowerStackParameter(SelectionDAG &DAG,
24022432
break;
24032433
}
24042434

2405-
ArgValue = DAG.getExtLoad(
2435+
SDValue ArgValue = DAG.getExtLoad(
24062436
ExtType, SL, VA.getLocVT(), Chain, FIN,
24072437
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI), MemVT);
2408-
return ArgValue;
2438+
2439+
SDValue ConvertedVal = convertABITypeToValueType(DAG, ArgValue, VA, SL);
2440+
if (ConvertedVal == ArgValue)
2441+
return ConvertedVal;
2442+
2443+
return DAG.getMergeValues({ConvertedVal, ArgValue.getValue(1)}, SL);
24092444
}
24102445

24112446
SDValue SITargetLowering::getPreloadedValue(
@@ -3396,30 +3431,7 @@ SDValue SITargetLowering::LowerFormalArguments(
33963431
DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), NumBits)));
33973432
}
33983433

3399-
// If this is an 8 or 16-bit value, it is really passed promoted
3400-
// to 32 bits. Insert an assert[sz]ext to capture this, then
3401-
// truncate to the right size.
3402-
switch (VA.getLocInfo()) {
3403-
case CCValAssign::Full:
3404-
break;
3405-
case CCValAssign::BCvt:
3406-
Val = DAG.getNode(ISD::BITCAST, DL, ValVT, Val);
3407-
break;
3408-
case CCValAssign::SExt:
3409-
Val = DAG.getNode(ISD::AssertSext, DL, VT, Val, DAG.getValueType(ValVT));
3410-
Val = DAG.getNode(ISD::TRUNCATE, DL, ValVT, Val);
3411-
break;
3412-
case CCValAssign::ZExt:
3413-
Val = DAG.getNode(ISD::AssertZext, DL, VT, Val, DAG.getValueType(ValVT));
3414-
Val = DAG.getNode(ISD::TRUNCATE, DL, ValVT, Val);
3415-
break;
3416-
case CCValAssign::AExt:
3417-
Val = DAG.getNode(ISD::TRUNCATE, DL, ValVT, Val);
3418-
break;
3419-
default:
3420-
llvm_unreachable("Unknown loc info!");
3421-
}
3422-
3434+
Val = convertABITypeToValueType(DAG, Val, VA, DL);
34233435
InVals.push_back(Val);
34243436
}
34253437

‎llvm/lib/Target/AMDGPU/SIISelLowering.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,9 @@ class SITargetLowering final : public AMDGPUTargetLowering {
5858
Align Alignment,
5959
ImplicitParameter Param) const;
6060

61+
SDValue convertABITypeToValueType(SelectionDAG &DAG, SDValue Val,
62+
CCValAssign &VA, const SDLoc &SL) const;
63+
6164
SDValue lowerStackParameter(SelectionDAG &DAG, CCValAssign &VA,
6265
const SDLoc &SL, SDValue Chain,
6366
const ISD::InputArg &Arg) const;

‎llvm/test/CodeGen/AMDGPU/stack-passed-subdword-arg-crash-issue157997.ll‎

Lines changed: 283 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,283 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
2+
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s
3+
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s
4+
5+
; Make sure that sub-dword arguments passed on the stack do not assert
6+
7+
define i32 @stack_arg_i1(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i1 %badarg) #0 {
8+
; GFX9-LABEL: stack_arg_i1:
9+
; GFX9: ; %bb.0:
10+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
11+
; GFX9-NEXT: buffer_load_ubyte v0, off, s[0:3], s32
12+
; GFX9-NEXT: s_waitcnt vmcnt(0)
13+
; GFX9-NEXT: s_setpc_b64 s[30:31]
14+
;
15+
; GFX11-LABEL: stack_arg_i1:
16+
; GFX11: ; %bb.0:
17+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
18+
; GFX11-NEXT: scratch_load_u8 v0, off, s32
19+
; GFX11-NEXT: s_waitcnt vmcnt(0)
20+
; GFX11-NEXT: s_setpc_b64 s[30:31]
21+
%ext = zext i1 %badarg to i32
22+
ret i32 %ext
23+
}
24+
25+
define i32 @stack_arg_i1_zeroext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i1 zeroext %badarg) #0 {
26+
; GFX9-LABEL: stack_arg_i1_zeroext:
27+
; GFX9: ; %bb.0:
28+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
29+
; GFX9-NEXT: buffer_load_ubyte v0, off, s[0:3], s32
30+
; GFX9-NEXT: s_waitcnt vmcnt(0)
31+
; GFX9-NEXT: s_setpc_b64 s[30:31]
32+
;
33+
; GFX11-LABEL: stack_arg_i1_zeroext:
34+
; GFX11: ; %bb.0:
35+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
36+
; GFX11-NEXT: scratch_load_u8 v0, off, s32
37+
; GFX11-NEXT: s_waitcnt vmcnt(0)
38+
; GFX11-NEXT: s_setpc_b64 s[30:31]
39+
%ext = zext i1 %badarg to i32
40+
ret i32 %ext
41+
}
42+
43+
define i32 @stack_arg_i1_signext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i1 signext %badarg) #0 {
44+
; GFX9-LABEL: stack_arg_i1_signext:
45+
; GFX9: ; %bb.0:
46+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
47+
; GFX9-NEXT: buffer_load_ubyte v0, off, s[0:3], s32
48+
; GFX9-NEXT: s_waitcnt vmcnt(0)
49+
; GFX9-NEXT: v_bfe_i32 v0, v0, 0, 1
50+
; GFX9-NEXT: s_setpc_b64 s[30:31]
51+
;
52+
; GFX11-LABEL: stack_arg_i1_signext:
53+
; GFX11: ; %bb.0:
54+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
55+
; GFX11-NEXT: scratch_load_u8 v0, off, s32
56+
; GFX11-NEXT: s_waitcnt vmcnt(0)
57+
; GFX11-NEXT: v_bfe_i32 v0, v0, 0, 1
58+
; GFX11-NEXT: s_setpc_b64 s[30:31]
59+
%ext = sext i1 %badarg to i32
60+
ret i32 %ext
61+
}
62+
63+
define i32 @stack_arg_i8(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i8 %badarg) #0 {
64+
; GFX9-LABEL: stack_arg_i8:
65+
; GFX9: ; %bb.0:
66+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
67+
; GFX9-NEXT: buffer_load_ubyte v0, off, s[0:3], s32
68+
; GFX9-NEXT: s_waitcnt vmcnt(0)
69+
; GFX9-NEXT: s_setpc_b64 s[30:31]
70+
;
71+
; GFX11-LABEL: stack_arg_i8:
72+
; GFX11: ; %bb.0:
73+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
74+
; GFX11-NEXT: scratch_load_u8 v0, off, s32
75+
; GFX11-NEXT: s_waitcnt vmcnt(0)
76+
; GFX11-NEXT: s_setpc_b64 s[30:31]
77+
%ext = zext i8 %badarg to i32
78+
ret i32 %ext
79+
}
80+
81+
define i32 @stack_arg_i8_zeroext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i8 zeroext %badarg) #0 {
82+
; GFX9-LABEL: stack_arg_i8_zeroext:
83+
; GFX9: ; %bb.0:
84+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
85+
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32
86+
; GFX9-NEXT: s_waitcnt vmcnt(0)
87+
; GFX9-NEXT: s_setpc_b64 s[30:31]
88+
;
89+
; GFX11-LABEL: stack_arg_i8_zeroext:
90+
; GFX11: ; %bb.0:
91+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
92+
; GFX11-NEXT: scratch_load_u16 v0, off, s32
93+
; GFX11-NEXT: s_waitcnt vmcnt(0)
94+
; GFX11-NEXT: s_setpc_b64 s[30:31]
95+
%ext = zext i8 %badarg to i32
96+
ret i32 %ext
97+
}
98+
99+
define i32 @stack_arg_i8_signext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i8 signext %badarg) #0 {
100+
; GFX9-LABEL: stack_arg_i8_signext:
101+
; GFX9: ; %bb.0:
102+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
103+
; GFX9-NEXT: buffer_load_sshort v0, off, s[0:3], s32
104+
; GFX9-NEXT: s_waitcnt vmcnt(0)
105+
; GFX9-NEXT: s_setpc_b64 s[30:31]
106+
;
107+
; GFX11-LABEL: stack_arg_i8_signext:
108+
; GFX11: ; %bb.0:
109+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
110+
; GFX11-NEXT: scratch_load_i16 v0, off, s32
111+
; GFX11-NEXT: s_waitcnt vmcnt(0)
112+
; GFX11-NEXT: s_setpc_b64 s[30:31]
113+
%ext = sext i8 %badarg to i32
114+
ret i32 %ext
115+
}
116+
117+
define i32 @stack_arg_i16(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i16 %badarg) #0 {
118+
; GFX9-LABEL: stack_arg_i16:
119+
; GFX9: ; %bb.0:
120+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
121+
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32
122+
; GFX9-NEXT: s_waitcnt vmcnt(0)
123+
; GFX9-NEXT: s_setpc_b64 s[30:31]
124+
;
125+
; GFX11-LABEL: stack_arg_i16:
126+
; GFX11: ; %bb.0:
127+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
128+
; GFX11-NEXT: scratch_load_u16 v0, off, s32
129+
; GFX11-NEXT: s_waitcnt vmcnt(0)
130+
; GFX11-NEXT: s_setpc_b64 s[30:31]
131+
%ext = zext i16 %badarg to i32
132+
ret i32 %ext
133+
}
134+
135+
define i32 @stack_arg_i16_zeroext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i16 zeroext %badarg) #0 {
136+
; GFX9-LABEL: stack_arg_i16_zeroext:
137+
; GFX9: ; %bb.0:
138+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
139+
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32
140+
; GFX9-NEXT: s_waitcnt vmcnt(0)
141+
; GFX9-NEXT: s_setpc_b64 s[30:31]
142+
;
143+
; GFX11-LABEL: stack_arg_i16_zeroext:
144+
; GFX11: ; %bb.0:
145+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
146+
; GFX11-NEXT: scratch_load_u16 v0, off, s32
147+
; GFX11-NEXT: s_waitcnt vmcnt(0)
148+
; GFX11-NEXT: s_setpc_b64 s[30:31]
149+
%ext = zext i16 %badarg to i32
150+
ret i32 %ext
151+
}
152+
153+
define i32 @stack_arg_i16_signext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i16 signext %badarg) #0 {
154+
; GFX9-LABEL: stack_arg_i16_signext:
155+
; GFX9: ; %bb.0:
156+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
157+
; GFX9-NEXT: buffer_load_sshort v0, off, s[0:3], s32
158+
; GFX9-NEXT: s_waitcnt vmcnt(0)
159+
; GFX9-NEXT: s_setpc_b64 s[30:31]
160+
;
161+
; GFX11-LABEL: stack_arg_i16_signext:
162+
; GFX11: ; %bb.0:
163+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
164+
; GFX11-NEXT: scratch_load_i16 v0, off, s32
165+
; GFX11-NEXT: s_waitcnt vmcnt(0)
166+
; GFX11-NEXT: s_setpc_b64 s[30:31]
167+
%ext = sext i16 %badarg to i32
168+
ret i32 %ext
169+
}
170+
171+
define i32 @stack_arg_i7(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i7 %badarg) #0 {
172+
; GFX9-LABEL: stack_arg_i7:
173+
; GFX9: ; %bb.0:
174+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
175+
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32
176+
; GFX9-NEXT: s_waitcnt vmcnt(0)
177+
; GFX9-NEXT: v_and_b32_e32 v0, 0x7f, v0
178+
; GFX9-NEXT: s_setpc_b64 s[30:31]
179+
;
180+
; GFX11-LABEL: stack_arg_i7:
181+
; GFX11: ; %bb.0:
182+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
183+
; GFX11-NEXT: scratch_load_u16 v0, off, s32
184+
; GFX11-NEXT: s_waitcnt vmcnt(0)
185+
; GFX11-NEXT: v_and_b32_e32 v0, 0x7f, v0
186+
; GFX11-NEXT: s_setpc_b64 s[30:31]
187+
%ext = zext i7 %badarg to i32
188+
ret i32 %ext
189+
}
190+
191+
define i32 @stack_arg_i7_zeroext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i7 zeroext %badarg) #0 {
192+
; GFX9-LABEL: stack_arg_i7_zeroext:
193+
; GFX9: ; %bb.0:
194+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
195+
; GFX9-NEXT: buffer_load_ushort v0, off, s[0:3], s32
196+
; GFX9-NEXT: s_waitcnt vmcnt(0)
197+
; GFX9-NEXT: s_setpc_b64 s[30:31]
198+
;
199+
; GFX11-LABEL: stack_arg_i7_zeroext:
200+
; GFX11: ; %bb.0:
201+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
202+
; GFX11-NEXT: scratch_load_u16 v0, off, s32
203+
; GFX11-NEXT: s_waitcnt vmcnt(0)
204+
; GFX11-NEXT: s_setpc_b64 s[30:31]
205+
%ext = zext i7 %badarg to i32
206+
ret i32 %ext
207+
}
208+
209+
define i32 @stack_arg_i7_signext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i7 signext %badarg) #0 {
210+
; GFX9-LABEL: stack_arg_i7_signext:
211+
; GFX9: ; %bb.0:
212+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
213+
; GFX9-NEXT: buffer_load_sshort v0, off, s[0:3], s32
214+
; GFX9-NEXT: s_waitcnt vmcnt(0)
215+
; GFX9-NEXT: s_setpc_b64 s[30:31]
216+
;
217+
; GFX11-LABEL: stack_arg_i7_signext:
218+
; GFX11: ; %bb.0:
219+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
220+
; GFX11-NEXT: scratch_load_i16 v0, off, s32
221+
; GFX11-NEXT: s_waitcnt vmcnt(0)
222+
; GFX11-NEXT: s_setpc_b64 s[30:31]
223+
%ext = sext i7 %badarg to i32
224+
ret i32 %ext
225+
}
226+
227+
define i32 @stack_arg_i17(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i17 %badarg) #0 {
228+
; GFX9-LABEL: stack_arg_i17:
229+
; GFX9: ; %bb.0:
230+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
231+
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32
232+
; GFX9-NEXT: s_waitcnt vmcnt(0)
233+
; GFX9-NEXT: v_and_b32_e32 v0, 0x1ffff, v0
234+
; GFX9-NEXT: s_setpc_b64 s[30:31]
235+
;
236+
; GFX11-LABEL: stack_arg_i17:
237+
; GFX11: ; %bb.0:
238+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
239+
; GFX11-NEXT: scratch_load_b32 v0, off, s32
240+
; GFX11-NEXT: s_waitcnt vmcnt(0)
241+
; GFX11-NEXT: v_and_b32_e32 v0, 0x1ffff, v0
242+
; GFX11-NEXT: s_setpc_b64 s[30:31]
243+
%ext = zext i17 %badarg to i32
244+
ret i32 %ext
245+
}
246+
247+
define i32 @stack_arg_i17_zeroext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i17 zeroext %badarg) #0 {
248+
; GFX9-LABEL: stack_arg_i17_zeroext:
249+
; GFX9: ; %bb.0:
250+
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
251+
; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32
252+
; GFX9-NEXT: s_waitcnt vmcnt(0)
253+
; GFX9-NEXT: s_setpc_b64 s[30:31]
254+
;
255+
; GFX11-LABEL: stack_arg_i17_zeroext:
256+
; GFX11: ; %bb.0:
257+
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
258+
; GFX11-NEXT: scratch_load_b32 v0, off, s32
259+
; GFX11-NEXT: s_waitcnt vmcnt(0)
260+
; GFX11-NEXT: s_setpc_b64 s[30:31]
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%ext = zext i17 %badarg to i32
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ret i32 %ext
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}
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define i32 @stack_arg_i17_signext(<8 x i32>, <8 x i32>, <8 x i32>, <4 x i32>, <3 x i32>, i17 signext %badarg) #0 {
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; GFX9-LABEL: stack_arg_i17_signext:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: buffer_load_dword v0, off, s[0:3], s32
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: stack_arg_i17_signext:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: scratch_load_b32 v0, off, s32
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; GFX11-NEXT: s_waitcnt vmcnt(0)
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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%ext = sext i17 %badarg to i32
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ret i32 %ext
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}
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attributes #0 = { nounwind }

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