@@ -87,23 +87,15 @@ void SystemZPreRASchedStrategy::initializePressureSets(
8787 const TargetRegisterInfo *TRI) {
8888
8989 // Based on the nature of the Vector/FP and GPR register classes, TableGen
90- // defines a set of PressureSets that reflects the overlap of register
90+ // defines a list of PressureSets that reflects the overlap of register
9191 // classes: FP regs affect both FP16Bit and VR16Bit PressureSets, while VR
92- // regs affect only VR16Bit. Similarly, GR64 affects GRX32Bit (with a
92+ // regs affect only VR16Bit. Similarly, GR64 affects only GRX32Bit (with a
9393 // weight of 2), while GR32 affects both GR32Bit and GRX32Bit.
9494 //
95- // This SchedStrategy doesn't use these PressureSets quite in the way
96- // originally intended, but rather just to check if use operands are
97- // already live or not in interesting cases. The distinctions between
98- // Vector/FP registers or GR64Bit/GR32Bit are not made when a defining
99- // instruction is scheduled low only if no uses are also becoming live.
100- // Therefore only the common PressureSets are relevant. For example, this
101- // instruction will always have 'FP16Bit -1':
102- //
103- // %14:vf128bit = VREPF %7:vr128bit, 1
104- //
105- // If %7 is already live, there would also be 'VR16Bit -1', which is the
106- // interesting case.
95+ // When an instruction defines a register the question is if any used
96+ // registers will become live when scheduling it. This can be checked by
97+ // looking at the PressureSets that are shared between overlapping register
98+ // classes.
10799 //
108100 // misched-prera-pdiffs.mir tests against any future change in the
109101 // PressureSets, so simply hard-code them here:
@@ -225,6 +217,7 @@ int SystemZPreRASchedStrategy::computeSULivenessScore(
225217 const MachineOperand &MO0 = MI->getOperand (0 );
226218 assert (!isPhysRegDef (MO0) && " Did not expect physreg def!" );
227219 bool IsLoad = isRegDef (MO0) && !MO0.isDead () && !IsRedefining[SU->NodeNum ];
220+ bool IsPrioLoad = IsLoad && isPrioVirtReg (MO0.getReg (), &DAG->MRI );
228221 bool PreservesSchedLat = SU->getHeight () <= Zone->getScheduledLatency ();
229222 const unsigned Cycles = 2 ;
230223 unsigned Margin = SchedModel->getIssueWidth () * (Cycles + SU->Latency - 1 );
@@ -233,34 +226,18 @@ int SystemZPreRASchedStrategy::computeSULivenessScore(
233226 !DAG->getBotRPTracker ().isRegLive (MO0.getReg ());
234227
235228 // Before pulling down a load (to close the live range), the liveness of
236- // the other operands are checked: only if no use register would become
237- // live is the load pulled down. This can be checked either by looking at
238- // the operands of MI and checking if the reg is live, or the PDiff of the
239- // SU can be used to infer the same answers. Both methods seem to give the
240- // same identical result, at least when building the benchmarks.
229+ // the use operands is checked. This can be checked either by looking at
230+ // the operands of MI, or at the PDiff of the SU.
241231 bool UsesLivePrio = false , UsesLiveAll = false ;
242232 if (!WITHPDIFFS) {
243233 // Find uses of registers that are not already live (kills).
244234 bool PrioKill = false ;
245235 bool GPRKill = false ;
246- bool HasPrioUse = false ;
247- for (unsigned I = 0 ; I < MI->getDesc ().getNumOperands (); ++I) {
248- const MachineOperand &MO = MI->getOperand (I);
249- if (!isVirtRegUse (MO))
250- continue ;
251- HasPrioUse |= isPrioVirtReg (MO.getReg (), &DAG->MRI );
252- if (DAG->getBotRPTracker ().isRegLive (MO.getReg ()))
253- continue ;
254- if (isPrioVirtReg (MO.getReg (), &DAG->MRI ))
255- PrioKill = true ;
256- else
257- GPRKill = true ;
258- }
259-
260- // Find the interesting properties.
261- // Prioritize FP: Ignore GPR/Addr kills with an FP def.
262- UsesLivePrio = IsLoad && !PrioKill &&
263- (isPrioVirtReg (MO0.getReg (), &DAG->MRI ) || !GPRKill);
236+ for (auto &MO : MI->explicit_uses ())
237+ if (isVirtRegUse (MO) && !DAG->getBotRPTracker ().isRegLive (MO.getReg ()))
238+ (isPrioVirtReg (MO.getReg (), &DAG->MRI ) ? PrioKill : GPRKill) = true ;
239+ // Prioritize FP: Ignore GPR/Addr regs with an FP def.
240+ UsesLivePrio = !PrioKill && (IsPrioLoad || !GPRKill);
264241 UsesLiveAll = !PrioKill && !GPRKill;
265242 } else if (MO0.isReg () && MO0.getReg ().isVirtual ()) {
266243 int PrioPressureChange = 0 ;
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