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[Loads] Also use isAligned when checking assumptions.
Also use isAligned when trying to use alignment and dereferenceable assumptions. This catches cases where dereferencable is known via the assumption but alignment is known via isAligned (e.g. via argument attribute or align of 1)
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2 files changed

+36
-66
lines changed

2 files changed

+36
-66
lines changed

llvm/lib/Analysis/Loads.cpp

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -173,9 +173,11 @@ static bool isDereferenceableAndAlignedPointer(
173173

174174
if (CtxI) {
175175
/// Look through assumes to see if both dereferencability and alignment can
176-
/// be provent by an assume
176+
/// be provent by an assume if needed.
177177
RetainedKnowledge AlignRK;
178178
RetainedKnowledge DerefRK;
179+
APInt Offset(DL.getTypeStoreSizeInBits(V->getType()), 0);
180+
bool IsAligned = isAligned(V, Offset, Alignment, DL);
179181
if (getKnowledgeForValue(
180182
V, {Attribute::Dereferenceable, Attribute::Alignment}, AC,
181183
[&](RetainedKnowledge RK, Instruction *Assume, auto) {
@@ -185,8 +187,10 @@ static bool isDereferenceableAndAlignedPointer(
185187
AlignRK = std::max(AlignRK, RK);
186188
if (RK.AttrKind == Attribute::Dereferenceable)
187189
DerefRK = std::max(DerefRK, RK);
188-
if (AlignRK && DerefRK && AlignRK.ArgValue >= Alignment.value() &&
189-
DerefRK.ArgValue >= Size.getZExtValue())
190+
if (!IsAligned && AlignRK &&
191+
AlignRK.ArgValue >= Alignment.value())
192+
return false;
193+
if (DerefRK && DerefRK.ArgValue >= Size.getZExtValue())
190194
return true; // We have found what we needed so we stop looking
191195
return false; // Other assumes may have better information. so
192196
// keep looking

llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll

Lines changed: 29 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -822,32 +822,15 @@ define void @deref_assumption_in_preheader_constant_trip_count_align_1(ptr noali
822822
; CHECK: [[VECTOR_PH]]:
823823
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
824824
; CHECK: [[VECTOR_BODY]]:
825-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
825+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
826826
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
827827
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
828828
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
829829
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4
830830
; CHECK-NEXT: [[TMP3:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
831-
; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i1> [[TMP3]], splat (i1 true)
832-
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i32 0
833-
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
834-
; CHECK: [[PRED_LOAD_IF]]:
835831
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]]
836-
; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 1
837-
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
838-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
839-
; CHECK: [[PRED_LOAD_CONTINUE]]:
840-
; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP8]], %[[PRED_LOAD_IF]] ]
841-
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP4]], i32 1
842-
; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2]]
843-
; CHECK: [[PRED_LOAD_IF1]]:
844-
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1
845-
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP11]]
846-
; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 1
847-
; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP13]], i32 1
848-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
849-
; CHECK: [[PRED_LOAD_CONTINUE2]]:
850-
; CHECK-NEXT: [[TMP15:%.*]] = phi <2 x i32> [ [[TMP9]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], %[[PRED_LOAD_IF1]] ]
832+
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP6]], i32 0
833+
; CHECK-NEXT: [[TMP15:%.*]] = load <2 x i32>, ptr [[TMP5]], align 1
851834
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[TMP15]]
852835
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
853836
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 0
@@ -1012,15 +995,32 @@ define void @align_and_deref_assumption_in_preheader_constant_trip_count_align_4
1012995
; CHECK: [[VECTOR_PH]]:
1013996
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
1014997
; CHECK: [[VECTOR_BODY]]:
1015-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
998+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
1016999
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
10171000
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
10181001
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
10191002
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4
10201003
; CHECK-NEXT: [[TMP3:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
1004+
; CHECK-NEXT: [[TMP15:%.*]] = xor <2 x i1> [[TMP3]], splat (i1 true)
1005+
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP15]], i32 0
1006+
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
1007+
; CHECK: [[PRED_LOAD_IF]]:
10211008
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]]
1022-
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP4]], i32 0
1023-
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x i32>, ptr [[TMP5]], align 4
1009+
; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP4]], align 4
1010+
; CHECK-NEXT: [[TMP17:%.*]] = insertelement <2 x i32> poison, i32 [[TMP16]], i32 0
1011+
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
1012+
; CHECK: [[PRED_LOAD_CONTINUE]]:
1013+
; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP17]], %[[PRED_LOAD_IF]] ]
1014+
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP15]], i32 1
1015+
; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2]]
1016+
; CHECK: [[PRED_LOAD_IF1]]:
1017+
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1
1018+
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP11]]
1019+
; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
1020+
; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP13]], i32 1
1021+
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
1022+
; CHECK: [[PRED_LOAD_CONTINUE2]]:
1023+
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = phi <2 x i32> [ [[TMP9]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], %[[PRED_LOAD_IF1]] ]
10241024
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[WIDE_LOAD1]]
10251025
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
10261026
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 0
@@ -1091,32 +1091,15 @@ define void @deref_assumption_in_preheader_constant_trip_count_align_4_known_via
10911091
; CHECK: [[VECTOR_PH]]:
10921092
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
10931093
; CHECK: [[VECTOR_BODY]]:
1094-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
1094+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
10951095
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
10961096
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
10971097
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
10981098
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4
10991099
; CHECK-NEXT: [[TMP3:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
1100-
; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i1> [[TMP3]], splat (i1 true)
1101-
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i32 0
1102-
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
1103-
; CHECK: [[PRED_LOAD_IF]]:
11041100
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]]
1105-
; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1106-
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
1107-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
1108-
; CHECK: [[PRED_LOAD_CONTINUE]]:
1109-
; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP8]], %[[PRED_LOAD_IF]] ]
1110-
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP4]], i32 1
1111-
; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2]]
1112-
; CHECK: [[PRED_LOAD_IF1]]:
1113-
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1
1114-
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP11]]
1115-
; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
1116-
; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP13]], i32 1
1117-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
1118-
; CHECK: [[PRED_LOAD_CONTINUE2]]:
1119-
; CHECK-NEXT: [[TMP15:%.*]] = phi <2 x i32> [ [[TMP9]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], %[[PRED_LOAD_IF1]] ]
1101+
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP6]], i32 0
1102+
; CHECK-NEXT: [[TMP15:%.*]] = load <2 x i32>, ptr [[TMP5]], align 4
11201103
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[TMP15]]
11211104
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
11221105
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 0
@@ -1186,32 +1169,15 @@ define void @deref_assumption_in_preheader_constant_trip_count_align_4_not_known
11861169
; CHECK: [[VECTOR_PH]]:
11871170
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
11881171
; CHECK: [[VECTOR_BODY]]:
1189-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
1172+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
11901173
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
11911174
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP0]]
11921175
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
11931176
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4
11941177
; CHECK-NEXT: [[TMP3:%.*]] = icmp sge <2 x i32> [[WIDE_LOAD]], zeroinitializer
1195-
; CHECK-NEXT: [[TMP4:%.*]] = xor <2 x i1> [[TMP3]], splat (i1 true)
1196-
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i32 0
1197-
; CHECK-NEXT: br i1 [[TMP5]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
1198-
; CHECK: [[PRED_LOAD_IF]]:
11991178
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]]
1200-
; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1201-
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
1202-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
1203-
; CHECK: [[PRED_LOAD_CONTINUE]]:
1204-
; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP8]], %[[PRED_LOAD_IF]] ]
1205-
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP4]], i32 1
1206-
; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2]]
1207-
; CHECK: [[PRED_LOAD_IF1]]:
1208-
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1
1209-
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP11]]
1210-
; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
1211-
; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP13]], i32 1
1212-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
1213-
; CHECK: [[PRED_LOAD_CONTINUE2]]:
1214-
; CHECK-NEXT: [[TMP15:%.*]] = phi <2 x i32> [ [[TMP9]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP14]], %[[PRED_LOAD_IF1]] ]
1179+
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[TMP6]], i32 0
1180+
; CHECK-NEXT: [[TMP15:%.*]] = load <2 x i32>, ptr [[TMP5]], align 4
12151181
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[TMP15]]
12161182
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[TMP0]]
12171183
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 0

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