@@ -2489,22 +2489,23 @@ bool PPCFrameLowering::spillCalleeSavedRegisters(
24892489 if (Spilled[Dst])
24902490 continue ;
24912491
2492- if (VSRContainingGPRs[Dst].second != 0 ) {
2492+ const auto &VSR = VSRContainingGPRs[Dst];
2493+ if (VSR.second != 0 ) {
24932494 assert (Subtarget.hasP9Vector () &&
24942495 " mtvsrdd is unavailable on pre-P9 targets." );
24952496
24962497 NumPESpillVSR += 2 ;
24972498 BuildMI (MBB, MI, DL, TII.get (PPC::MTVSRDD), Dst)
2498- .addReg (VSRContainingGPRs[Dst] .first , getKillRegState (true ))
2499- .addReg (VSRContainingGPRs[Dst] .second , getKillRegState (true ));
2500- } else if (VSRContainingGPRs[Dst] .second == 0 ) {
2499+ .addReg (VSR .first , getKillRegState (true ))
2500+ .addReg (VSR .second , getKillRegState (true ));
2501+ } else if (VSR .second == 0 ) {
25012502 assert (Subtarget.hasP8Vector () &&
25022503 " Can't move GPR to VSR on pre-P8 targets." );
25032504
25042505 ++NumPESpillVSR;
25052506 BuildMI (MBB, MI, DL, TII.get (PPC::MTVSRD),
25062507 TRI->getSubReg (Dst, PPC::sub_64))
2507- .addReg (VSRContainingGPRs[Dst] .first , getKillRegState (true ));
2508+ .addReg (VSR .first , getKillRegState (true ));
25082509 } else {
25092510 llvm_unreachable (" More than two GPRs spilled to a VSR!" );
25102511 }
0 commit comments