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[RISCV] Rename atomic instructions to remove underscore between AQ and RL. NFC (#162321)
Instruction names should match the mnemomic with '.' replaced by '_'. The instruction mnemonics use ".aqrl" not ".aq.rl".
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5 files changed

+49
-48
lines changed

5 files changed

+49
-48
lines changed

‎llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -166,7 +166,7 @@ static unsigned getLRForRMW32(AtomicOrdering Ordering,
166166
return RISCV::LR_W;
167167
return RISCV::LR_W_AQ;
168168
case AtomicOrdering::SequentiallyConsistent:
169-
return RISCV::LR_W_AQ_RL;
169+
return RISCV::LR_W_AQRL;
170170
}
171171
}
172172

@@ -210,7 +210,7 @@ static unsigned getLRForRMW64(AtomicOrdering Ordering,
210210
return RISCV::LR_D;
211211
return RISCV::LR_D_AQ;
212212
case AtomicOrdering::SequentiallyConsistent:
213-
return RISCV::LR_D_AQ_RL;
213+
return RISCV::LR_D_AQRL;
214214
}
215215
}
216216

‎llvm/lib/Target/RISCV/RISCVInstrInfoA.td‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -24,10 +24,10 @@ class LR_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
2424
}
2525

2626
multiclass LR_r_aq_rl<bits<3> funct3, string opcodestr> {
27-
def "" : LR_r<0, 0, funct3, opcodestr>;
28-
def _AQ : LR_r<1, 0, funct3, opcodestr # ".aq">;
29-
def _RL : LR_r<0, 1, funct3, opcodestr # ".rl">;
30-
def _AQ_RL : LR_r<1, 1, funct3, opcodestr # ".aqrl">;
27+
def "" : LR_r<0, 0, funct3, opcodestr>;
28+
def _AQ : LR_r<1, 0, funct3, opcodestr # ".aq">;
29+
def _RL : LR_r<0, 1, funct3, opcodestr # ".rl">;
30+
def _AQRL : LR_r<1, 1, funct3, opcodestr # ".aqrl">;
3131
}
3232

3333
let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in
@@ -37,10 +37,10 @@ class SC_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
3737
opcodestr, "$rd, $rs2, $rs1">;
3838

3939
multiclass SC_r_aq_rl<bits<3> funct3, string opcodestr> {
40-
def "" : SC_r<0, 0, funct3, opcodestr>;
41-
def _AQ : SC_r<1, 0, funct3, opcodestr # ".aq">;
42-
def _RL : SC_r<0, 1, funct3, opcodestr # ".rl">;
43-
def _AQ_RL : SC_r<1, 1, funct3, opcodestr # ".aqrl">;
40+
def "" : SC_r<0, 0, funct3, opcodestr>;
41+
def _AQ : SC_r<1, 0, funct3, opcodestr # ".aq">;
42+
def _RL : SC_r<0, 1, funct3, opcodestr # ".rl">;
43+
def _AQRL : SC_r<1, 1, funct3, opcodestr # ".aqrl">;
4444
}
4545

4646
let hasSideEffects = 0, mayLoad = 1, mayStore = 1 in
@@ -50,10 +50,10 @@ class AMO_rr<bits<5> funct5, bit aq, bit rl, bits<3> funct3, string opcodestr>
5050
opcodestr, "$rd, $rs2, $rs1">;
5151

5252
multiclass AMO_rr_aq_rl<bits<5> funct5, bits<3> funct3, string opcodestr> {
53-
def "" : AMO_rr<funct5, 0, 0, funct3, opcodestr>;
54-
def _AQ : AMO_rr<funct5, 1, 0, funct3, opcodestr # ".aq">;
55-
def _RL : AMO_rr<funct5, 0, 1, funct3, opcodestr # ".rl">;
56-
def _AQ_RL : AMO_rr<funct5, 1, 1, funct3, opcodestr # ".aqrl">;
53+
def "" : AMO_rr<funct5, 0, 0, funct3, opcodestr>;
54+
def _AQ : AMO_rr<funct5, 1, 0, funct3, opcodestr # ".aq">;
55+
def _RL : AMO_rr<funct5, 0, 1, funct3, opcodestr # ".rl">;
56+
def _AQRL : AMO_rr<funct5, 1, 1, funct3, opcodestr # ".aqrl">;
5757
}
5858

5959
//===----------------------------------------------------------------------===//
@@ -198,9 +198,9 @@ let Predicates = !listconcat([HasStdExtA, NoStdExtZtso], ExtraPreds) in {
198198
def : PatGprGpr<!cast<PatFrag>(AtomicOp#"_release"),
199199
!cast<RVInst>(BaseInst#"_RL"), vt>;
200200
def : PatGprGpr<!cast<PatFrag>(AtomicOp#"_acq_rel"),
201-
!cast<RVInst>(BaseInst#"_AQ_RL"), vt>;
201+
!cast<RVInst>(BaseInst#"_AQRL"), vt>;
202202
def : PatGprGpr<!cast<PatFrag>(AtomicOp#"_seq_cst"),
203-
!cast<RVInst>(BaseInst#"_AQ_RL"), vt>;
203+
!cast<RVInst>(BaseInst#"_AQRL"), vt>;
204204
}
205205
let Predicates = !listconcat([HasStdExtA, HasStdExtZtso], ExtraPreds) in {
206206
def : PatGprGpr<!cast<PatFrag>(AtomicOp#"_monotonic"),

‎llvm/lib/Target/RISCV/RISCVInstrInfoZa.td‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -49,10 +49,10 @@ class AMO_cas<bits<5> funct5, bit aq, bit rl, bits<3> funct3, string opcodestr,
4949

5050
multiclass AMO_cas_aq_rl<bits<5> funct5, bits<3> funct3, string opcodestr,
5151
DAGOperand RC> {
52-
def "" : AMO_cas<funct5, 0, 0, funct3, opcodestr, RC>;
53-
def _AQ : AMO_cas<funct5, 1, 0, funct3, opcodestr # ".aq", RC>;
54-
def _RL : AMO_cas<funct5, 0, 1, funct3, opcodestr # ".rl", RC>;
55-
def _AQ_RL : AMO_cas<funct5, 1, 1, funct3, opcodestr # ".aqrl", RC>;
52+
def "" : AMO_cas<funct5, 0, 0, funct3, opcodestr, RC>;
53+
def _AQ : AMO_cas<funct5, 1, 0, funct3, opcodestr # ".aq", RC>;
54+
def _RL : AMO_cas<funct5, 0, 1, funct3, opcodestr # ".rl", RC>;
55+
def _AQRL : AMO_cas<funct5, 1, 1, funct3, opcodestr # ".aqrl", RC>;
5656
}
5757

5858
let Predicates = [HasStdExtZacas], IsSignExtendingOpW = 1 in {
@@ -86,11 +86,11 @@ multiclass AMOCASPat<string AtomicOp, string BaseInst, ValueType vt = XLenVT,
8686
def : Pat<(!cast<PatFrag>(AtomicOp#"_acq_rel") (vt GPR:$addr),
8787
(vt GPR:$cmp),
8888
(vt GPR:$new)),
89-
(!cast<RVInst>(BaseInst#"_AQ_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
89+
(!cast<RVInst>(BaseInst#"_AQRL") GPR:$cmp, GPR:$addr, GPR:$new)>;
9090
def : Pat<(!cast<PatFrag>(AtomicOp#"_seq_cst") (vt GPR:$addr),
9191
(vt GPR:$cmp),
9292
(vt GPR:$new)),
93-
(!cast<RVInst>(BaseInst#"_AQ_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
93+
(!cast<RVInst>(BaseInst#"_AQRL") GPR:$cmp, GPR:$addr, GPR:$new)>;
9494
} // Predicates = !listconcat([HasStdExtZacas, NoStdExtZtso], ExtraPreds)
9595
let Predicates = !listconcat([HasStdExtZacas, HasStdExtZtso], ExtraPreds) in {
9696
def : Pat<(!cast<PatFrag>(AtomicOp#"_monotonic") (vt GPR:$addr),

‎llvm/lib/Target/RISCV/RISCVInstrInfoZalasr.td‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -30,14 +30,15 @@ class SRL_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
3030
opcodestr, "$rs2, $rs1"> {
3131
let rd = 0;
3232
}
33+
3334
multiclass LAQ_r_aq_rl<bits<3> funct3, string opcodestr> {
34-
def _AQ : LAQ_r<1, 0, funct3, opcodestr # ".aq">;
35-
def _AQ_RL : LAQ_r<1, 1, funct3, opcodestr # ".aqrl">;
35+
def _AQ : LAQ_r<1, 0, funct3, opcodestr # ".aq">;
36+
def _AQRL : LAQ_r<1, 1, funct3, opcodestr # ".aqrl">;
3637
}
3738

3839
multiclass SRL_r_aq_rl<bits<3> funct3, string opcodestr> {
39-
def _RL : SRL_r<0, 1, funct3, opcodestr # ".rl">;
40-
def _AQ_RL : SRL_r<1, 1, funct3, opcodestr # ".aqrl">;
40+
def _RL : SRL_r<0, 1, funct3, opcodestr # ".rl">;
41+
def _AQRL : SRL_r<1, 1, funct3, opcodestr # ".aqrl">;
4142
}
4243

4344
//===----------------------------------------------------------------------===//

‎llvm/test/tools/llvm-mca/RISCV/SpacemitX60/atomic.s‎

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -126,19 +126,19 @@ amomaxu.d.aqrl s5, s4, (s3)
126126
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_W lr.w t0, (t1)
127127
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_W_AQ lr.w.aq t1, (t2)
128128
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_W_RL lr.w.rl t2, (t3)
129-
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_W_AQ_RL lr.w.aqrl t3, (t4)
129+
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_W_AQRL lr.w.aqrl t3, (t4)
130130
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_W sc.w t6, t5, (t4)
131131
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_W_AQ sc.w.aq t5, t4, (t3)
132132
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_W_RL sc.w.rl t4, t3, (t2)
133-
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_W_AQ_RL sc.w.aqrl t3, t2, (t1)
133+
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_W_AQRL sc.w.aqrl t3, t2, (t1)
134134
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_D lr.d t0, (t1)
135135
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_D_AQ lr.d.aq t1, (t2)
136136
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_D_RL lr.d.rl t2, (t3)
137-
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_D_AQ_RL lr.d.aqrl t3, (t4)
137+
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS LR_D_AQRL lr.d.aqrl t3, (t4)
138138
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_D sc.d t6, t5, (t4)
139139
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_D_AQ sc.d.aq t5, t4, (t3)
140140
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_D_RL sc.d.rl t4, t3, (t2)
141-
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_D_AQ_RL sc.d.aqrl t3, t2, (t1)
141+
# CHECK-NEXT: 1 8 0.50 * 8 SMX60_LS SC_D_AQRL sc.d.aqrl t3, t2, (t1)
142142
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOSWAP_W amoswap.w a4, ra, (s0)
143143
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOADD_W amoadd.w a1, a2, (a3)
144144
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOXOR_W amoxor.w a2, a3, (a4)
@@ -166,15 +166,15 @@ amomaxu.d.aqrl s5, s4, (s3)
166166
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAX_W_RL amomax.w.rl s7, s6, (s5)
167167
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMINU_W_RL amominu.w.rl s6, s5, (s4)
168168
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAXU_W_RL amomaxu.w.rl s5, s4, (s3)
169-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOSWAP_W_AQ_RL amoswap.w.aqrl a4, ra, (s0)
170-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOADD_W_AQ_RL amoadd.w.aqrl a1, a2, (a3)
171-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOXOR_W_AQ_RL amoxor.w.aqrl a2, a3, (a4)
172-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOAND_W_AQ_RL amoand.w.aqrl a3, a4, (a5)
173-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOOR_W_AQ_RL amoor.w.aqrl a4, a5, (a6)
174-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMIN_W_AQ_RL amomin.w.aqrl a5, a6, (a7)
175-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAX_W_AQ_RL amomax.w.aqrl s7, s6, (s5)
176-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMINU_W_AQ_RL amominu.w.aqrl s6, s5, (s4)
177-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAXU_W_AQ_RL amomaxu.w.aqrl s5, s4, (s3)
169+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOSWAP_W_AQRL amoswap.w.aqrl a4, ra, (s0)
170+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOADD_W_AQRL amoadd.w.aqrl a1, a2, (a3)
171+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOXOR_W_AQRL amoxor.w.aqrl a2, a3, (a4)
172+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOAND_W_AQRL amoand.w.aqrl a3, a4, (a5)
173+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOOR_W_AQRL amoor.w.aqrl a4, a5, (a6)
174+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMIN_W_AQRL amomin.w.aqrl a5, a6, (a7)
175+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAX_W_AQRL amomax.w.aqrl s7, s6, (s5)
176+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMINU_W_AQRL amominu.w.aqrl s6, s5, (s4)
177+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAXU_W_AQRL amomaxu.w.aqrl s5, s4, (s3)
178178
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOSWAP_D amoswap.d a4, ra, (s0)
179179
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOADD_D amoadd.d a1, a2, (a3)
180180
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOXOR_D amoxor.d a2, a3, (a4)
@@ -202,15 +202,15 @@ amomaxu.d.aqrl s5, s4, (s3)
202202
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAX_D_RL amomax.d.rl s7, s6, (s5)
203203
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMINU_D_RL amominu.d.rl s6, s5, (s4)
204204
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAXU_D_RL amomaxu.d.rl s5, s4, (s3)
205-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOSWAP_D_AQ_RL amoswap.d.aqrl a4, ra, (s0)
206-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOADD_D_AQ_RL amoadd.d.aqrl a1, a2, (a3)
207-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOXOR_D_AQ_RL amoxor.d.aqrl a2, a3, (a4)
208-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOAND_D_AQ_RL amoand.d.aqrl a3, a4, (a5)
209-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOOR_D_AQ_RL amoor.d.aqrl a4, a5, (a6)
210-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMIN_D_AQ_RL amomin.d.aqrl a5, a6, (a7)
211-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAX_D_AQ_RL amomax.d.aqrl s7, s6, (s5)
212-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMINU_D_AQ_RL amominu.d.aqrl s6, s5, (s4)
213-
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAXU_D_AQ_RL amomaxu.d.aqrl s5, s4, (s3)
205+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOSWAP_D_AQRL amoswap.d.aqrl a4, ra, (s0)
206+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOADD_D_AQRL amoadd.d.aqrl a1, a2, (a3)
207+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOXOR_D_AQRL amoxor.d.aqrl a2, a3, (a4)
208+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOAND_D_AQRL amoand.d.aqrl a3, a4, (a5)
209+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOOR_D_AQRL amoor.d.aqrl a4, a5, (a6)
210+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMIN_D_AQRL amomin.d.aqrl a5, a6, (a7)
211+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAX_D_AQRL amomax.d.aqrl s7, s6, (s5)
212+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMINU_D_AQRL amominu.d.aqrl s6, s5, (s4)
213+
# CHECK-NEXT: 1 12 0.50 * * 12 SMX60_LS AMOMAXU_D_AQRL amomaxu.d.aqrl s5, s4, (s3)
214214

215215
# CHECK: Resources:
216216
# CHECK-NEXT: [0] - SMX60_FP

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