@@ -621,7 +621,7 @@ def CountBits : DXILOp<31, unaryBits> {
621621def FirstbitHi : DXILOp<33, unaryBits> {
622622 let Doc = "Returns the location of the first set bit starting from "
623623 "the highest order bit and working downward.";
624- let LLVMIntrinsic = int_dx_firstbituhigh;
624+ let intrinsics = [ IntrinSelect< int_dx_firstbituhigh> ] ;
625625 let arguments = [OverloadTy];
626626 let result = Int32Ty;
627627 let overloads =
@@ -633,7 +633,7 @@ def FirstbitHi : DXILOp<33, unaryBits> {
633633def FirstbitSHi : DXILOp<34, unaryBits> {
634634 let Doc = "Returns the location of the first set bit from "
635635 "the highest order bit based on the sign.";
636- let LLVMIntrinsic = int_dx_firstbitshigh;
636+ let intrinsics = [ IntrinSelect< int_dx_firstbitshigh> ] ;
637637 let arguments = [OverloadTy];
638638 let result = Int32Ty;
639639 let overloads =
@@ -826,7 +826,7 @@ def CheckAccessFullyMapped : DXILOp<71, checkAccessFullyMapped> {
826826
827827def Discard : DXILOp<82, discard> {
828828 let Doc = "discard the current pixel";
829- let LLVMIntrinsic = int_dx_discard;
829+ let intrinsics = [ IntrinSelect< int_dx_discard> ] ;
830830 let arguments = [Int1Ty];
831831 let result = VoidTy;
832832 let stages = [Stages<DXIL1_0, [pixel]>];
@@ -874,7 +874,7 @@ def FlattenedThreadIdInGroup : DXILOp<96, flattenedThreadIdInGroup> {
874874
875875def MakeDouble : DXILOp<101, makeDouble> {
876876 let Doc = "creates a double value";
877- let LLVMIntrinsic = int_dx_asdouble;
877+ let intrinsics = [ IntrinSelect< int_dx_asdouble> ] ;
878878 let arguments = [Int32Ty, Int32Ty];
879879 let result = DoubleTy;
880880 let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -893,7 +893,7 @@ def SplitDouble : DXILOp<102, splitDouble> {
893893def Dot4AddI8Packed : DXILOp<163, dot4AddPacked> {
894894 let Doc = "signed dot product of 4 x i8 vectors packed into i32, with "
895895 "accumulate to i32";
896- let LLVMIntrinsic = int_dx_dot4add_i8packed;
896+ let intrinsics = [ IntrinSelect< int_dx_dot4add_i8packed> ] ;
897897 let arguments = [Int32Ty, Int32Ty, Int32Ty];
898898 let result = Int32Ty;
899899 let attributes = [Attributes<DXIL1_0, [ReadNone]>];
@@ -903,7 +903,7 @@ def Dot4AddI8Packed : DXILOp<163, dot4AddPacked> {
903903def Dot4AddU8Packed : DXILOp<164, dot4AddPacked> {
904904 let Doc = "unsigned dot product of 4 x i8 vectors packed into i32, with "
905905 "accumulate to i32";
906- let LLVMIntrinsic = int_dx_dot4add_u8packed;
906+ let intrinsics = [ IntrinSelect< int_dx_dot4add_u8packed> ] ;
907907 let arguments = [Int32Ty, Int32Ty, Int32Ty];
908908 let result = Int32Ty;
909909 let attributes = [Attributes<DXIL1_0, [ReadNone]>];
@@ -926,7 +926,7 @@ def CreateHandleFromBinding : DXILOp<217, createHandleFromBinding> {
926926
927927def WaveActiveAnyTrue : DXILOp<113, waveAnyTrue> {
928928 let Doc = "returns true if the expression is true in any of the active lanes in the current wave";
929- let LLVMIntrinsic = int_dx_wave_any;
929+ let intrinsics = [ IntrinSelect< int_dx_wave_any> ] ;
930930 let arguments = [Int1Ty];
931931 let result = Int1Ty;
932932 let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -962,11 +962,12 @@ def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
962962
963963def WaveAllBitCount : DXILOp<135, waveAllOp> {
964964 let Doc = "returns the count of bits set to 1 across the wave";
965- let LLVMIntrinsic = int_dx_wave_active_countbits;
965+ let intrinsics = [ IntrinSelect< int_dx_wave_active_countbits> ] ;
966966 let arguments = [Int1Ty];
967967 let result = Int32Ty;
968968 let stages = [Stages<DXIL1_0, [all_stages]>];
969969 let attributes = [Attributes<DXIL1_0, [ReadNone]>];
970+ }
970971
971972def Barrier : DXILOp<80, barrier> {
972973 let Doc = "inserts a memory barrier in the shader";
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