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revert unintentional white space changes
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llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -583,7 +583,7 @@ getOperationOrderings(MemSDNode *N, const NVPTXSubtarget *Subtarget) {
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// |------------------------------------------------------|-------------------------------|
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// | cuda::atomic_load | fence.sc.<scope>; |
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// | (memory_order_seq_cst, cuda::thread_scope_<scope>) | ld.acquire.<scope>; |
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// |------------------------------------------------------|-------------------------------|
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// |------------------------------------------------------|-------------------------------|
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// | cuda::atomic_store | fence.sc.<scope>; |
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// | (memory_order_seq_cst, cuda::thread_scope_<scope>) | st.release.<scope>; |
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// |------------------------------------------------------|-------------------------------|
@@ -2808,8 +2808,8 @@ void NVPTXDAGToDAGISel::SelectCpAsyncBulkPrefetchL2(SDNode *N) {
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SDLoc DL(N);
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SmallVector<SDValue, 4> Ops(N->ops().slice(2, NumArgs));
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Ops.push_back(N->getOperand(0)); // Chain operand
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unsigned Opcode = IsCacheHint
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unsigned Opcode = IsCacheHint
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? NVPTX::CP_ASYNC_BULK_PREFETCH_CH
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: NVPTX::CP_ASYNC_BULK_PREFETCH;
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ReplaceNode(N, CurDAG->getMachineNode(Opcode, DL, N->getVTList(), Ops));

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