@@ -187,8 +187,6 @@ void SPIRVPreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
187187 AU.addPreserved <GISelKnownBitsAnalysis>();
188188 AU.addRequired <MachineDominatorTreeWrapperPass>();
189189 AU.addPreserved <MachineDominatorTreeWrapperPass>();
190- AU.addRequired <GISelCSEAnalysisWrapperPass>();
191- AU.addPreserved <GISelCSEAnalysisWrapperPass>();
192190 MachineFunctionPass::getAnalysisUsage (AU);
193191}
194192
@@ -206,11 +204,6 @@ bool SPIRVPreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
206204 return false ;
207205 auto &TPC = getAnalysis<TargetPassConfig>();
208206
209- // Enable CSE.
210- GISelCSEAnalysisWrapper &Wrapper =
211- getAnalysis<GISelCSEAnalysisWrapperPass>().getCSEWrapper ();
212- auto *CSEInfo = &Wrapper.get (TPC.getCSEConfig ());
213-
214207 const SPIRVSubtarget &ST = MF.getSubtarget <SPIRVSubtarget>();
215208 const auto *LI = ST.getLegalizerInfo ();
216209
@@ -229,8 +222,8 @@ bool SPIRVPreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
229222 // This is the first Combiner, so the input IR might contain dead
230223 // instructions.
231224 CInfo.EnableFullDCE = true ;
232- SPIRVPreLegalizerCombinerImpl Impl (MF, CInfo, &TPC, *KB, CSEInfo, RuleConfig ,
233- ST, MDT, LI);
225+ SPIRVPreLegalizerCombinerImpl Impl (MF, CInfo, &TPC, *KB, /* CSEInfo*/ nullptr ,
226+ RuleConfig, ST, MDT, LI);
234227 return Impl.combineMachineInstrs ();
235228}
236229
@@ -240,7 +233,6 @@ INITIALIZE_PASS_BEGIN(SPIRVPreLegalizerCombiner, DEBUG_TYPE,
240233 false )
241234INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
242235INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis)
243- INITIALIZE_PASS_DEPENDENCY(GISelCSEAnalysisWrapperPass)
244236INITIALIZE_PASS_END(SPIRVPreLegalizerCombiner, DEBUG_TYPE,
245237 " Combine SPIRV machine instrs before legalization" , false ,
246238 false )
0 commit comments