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[X86] Improve readability
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+22
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 22 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -53733,35 +53733,24 @@ static SDValue combineLRINT_LLRINT(SDNode *N, SelectionDAG &DAG,
5373353733
return DAG.getNode(X86ISD::CVTP2SI, DL, VT, Src);
5373453734
}
5373553735

53736-
// Attempt to fold some (truncate (srl (binop X, C1), C2)) patterns to
53737-
// (binop (truncate (srl X, C2)), C1'). C1' will be smaller than C1 so we are
53738-
// able to avoid generating code with MOVABS and large constants in certain
53736+
// Attempt to fold some (truncate (srl (add/or/xor X, C1), C2)) patterns to
53737+
// (add/or/xor (truncate (srl X, C2)), C1'). C1' will be smaller than C1 so we
53738+
// are able to avoid generating code with MOVABS and large constants in certain
5373953739
// cases.
53740-
static SDValue combinei64TruncSrlBinop(SDValue N, EVT VT, SelectionDAG &DAG,
53741-
const SDLoc &DL) {
53740+
static SDValue combinei64TruncSrlConstant(SDValue N, EVT VT, SelectionDAG &DAG,
53741+
const SDLoc &DL) {
5374253742

53743-
SDValue Binop = N.getOperand(0);
53744-
APInt BinopConst = Binop.getConstantOperandAPInt(1);
53743+
SDValue Op = N.getOperand(0);
53744+
APInt OpConst = Op.getConstantOperandAPInt(1);
5374553745
APInt SrlConst = N.getConstantOperandAPInt(1);
53746-
unsigned Opcode = Binop.getOpcode();
53747-
53748-
auto CleanUpFn = +[](SDValue Op, EVT CleanUpVT, EVT VT, SelectionDAG &DAG,
53749-
const SDLoc &DL) {
53750-
SDValue CleanUp = DAG.getAnyExtOrTrunc(Op, DL, CleanUpVT);
53751-
return DAG.getAnyExtOrTrunc(CleanUp, DL, VT);
53752-
};
53753-
auto ZeroExtCleanUp = +[](SDValue Op, EVT CleanUpVT, EVT VT,
53754-
SelectionDAG &DAG, const SDLoc &DL) {
53755-
return DAG.getZeroExtendInReg(Op, DL, CleanUpVT);
53756-
};
53746+
unsigned Opcode = Op.getOpcode();
5375753747

5375853748
switch (Opcode) {
5375953749
default:
5376053750
return SDValue();
5376153751
case ISD::ADD:
53762-
if (BinopConst.countr_zero() < SrlConst.getZExtValue())
53752+
if (OpConst.countr_zero() < SrlConst.getZExtValue())
5376353753
return SDValue();
53764-
CleanUpFn = ZeroExtCleanUp;
5376553754
[[fallthrough]];
5376653755
case ISD::OR:
5376753756
case ISD::XOR:
@@ -53770,16 +53759,21 @@ static SDValue combinei64TruncSrlBinop(SDValue N, EVT VT, SelectionDAG &DAG,
5377053759
break;
5377153760
}
5377253761

53773-
SDValue BinopLHSSrl =
53774-
DAG.getNode(ISD::SRL, DL, MVT::i64, Binop.getOperand(0), N.getOperand(1));
53775-
SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, VT, BinopLHSSrl);
53762+
SDValue OpLhsSrl =
53763+
DAG.getNode(ISD::SRL, DL, MVT::i64, Op.getOperand(0), N.getOperand(1));
53764+
SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, VT, OpLhsSrl);
5377653765

53777-
APInt NewBinopConstVal = BinopConst.lshr(SrlConst).trunc(VT.getSizeInBits());
53778-
SDValue NewBinopConst = DAG.getConstant(NewBinopConstVal, DL, VT);
53779-
SDValue NewBinopNode = DAG.getNode(Opcode, DL, VT, Trunc, NewBinopConst);
53766+
APInt NewOpConstVal = OpConst.lshr(SrlConst).trunc(VT.getSizeInBits());
53767+
SDValue NewOpConst = DAG.getConstant(NewOpConstVal, DL, VT);
53768+
SDValue NewOpNode = DAG.getNode(Opcode, DL, VT, Trunc, NewOpConst);
5378053769
EVT CleanUpVT =
5378153770
EVT::getIntegerVT(*DAG.getContext(), 64 - SrlConst.getZExtValue());
53782-
return CleanUpFn(NewBinopNode, CleanUpVT, VT, DAG, DL);
53771+
53772+
if (Opcode == ISD::ADD)
53773+
return DAG.getZeroExtendInReg(NewOpNode, DL, CleanUpVT);
53774+
53775+
SDValue CleanUp = DAG.getAnyExtOrTrunc(NewOpNode, DL, CleanUpVT);
53776+
return DAG.getAnyExtOrTrunc(CleanUp, DL, VT);
5378353777
}
5378453778

5378553779
/// Attempt to pre-truncate inputs to arithmetic ops if it will simplify
@@ -53831,7 +53825,7 @@ static SDValue combineTruncatedArithmetic(SDNode *N, SelectionDAG &DAG,
5383153825
Src.getOperand(0).getNumOperands() == 2 &&
5383253826
isa<ConstantSDNode>(Src.getOperand(1)) &&
5383353827
isa<ConstantSDNode>(Src.getOperand(0).getOperand(1))) {
53834-
if (SDValue R = combinei64TruncSrlBinop(Src, VT, DAG, DL))
53828+
if (SDValue R = combinei64TruncSrlConstant(Src, VT, DAG, DL))
5383553829
return R;
5383653830
return SDValue();
5383753831
}

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