[InstCombine] Fold mul (lshr exact (X, 2^N + 1)), N -> add (X , lshr (X, N))

Alive2 Proofs:
https://alive2.llvm.org/ce/z/LVqGEo
https://alive2.llvm.org/ce/z/dyeGEv

Author: AZero13

llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp

@@ -255,6 +255,38 @@ Instruction *InstCombinerImpl::visitMul(BinaryOperator &I) {
     }
   }
 
+  {
+    // mul (lshr exact X, N), (2^N + 1) -> add (X , lshr (X, N))
+    Value *NewOp;
+    const APInt *ShiftC;
+    const APInt *MulAP;
+    if ((HasNSW || HasNUW) &&
+        match(&I, m_Mul(m_CombineOr(m_LShr(m_Value(NewOp), m_APInt(ShiftC)),
+                                    m_AShr(m_Value(NewOp), m_APInt(ShiftC))),
+                        m_APInt(MulAP)))) {
+      if (BitWidth > 2 && (*MulAP - 1).isPowerOf2() &&
+          MulAP->logBase2() == ShiftC->getZExtValue()) {
+        BinaryOperator *OpBO = cast<BinaryOperator>(Op0);
+        if (OpBO->isExact()) {
+          Value *BinOp = Op0;
+          if (HasNUW && OpBO->getOpcode() == Instruction::AShr &&
+              OpBO->hasOneUse())
+            BinOp = Builder.CreateLShr(
+                NewOp, ConstantInt::get(Ty, ShiftC->getZExtValue()), "",
+                /*isExact=*/true);
+
+          auto *NewAdd = BinaryOperator::CreateAdd(NewOp, BinOp);
+          if (HasNSW && (OpBO->getOpcode() == Instruction::LShr ||
+                         ShiftC->getZExtValue() < BitWidth - 1))
+            NewAdd->setHasNoSignedWrap(true);
+
+          NewAdd->setHasNoUnsignedWrap(HasNUW);
+          return NewAdd;
+        }
+      }
+    }
+  }
+
   if (Op0->hasOneUse() && match(Op1, m_NegatedPower2())) {
     // Interpret  X * (-1<<C)  as  (-X) * (1<<C)  and try to sink the negation.
     // The "* (1<<C)" thus becomes a potential shifting opportunity.

llvm/test/Transforms/InstCombine/ashr-lshr.ll

@@ -875,8 +875,8 @@ define i32 @ashr_shift_mul(i32 %x) {
 
 define i32 @ashr_shift_mul_nuw(i32 %x) {
 ; CHECK-LABEL: @ashr_shift_mul_nuw(
-; CHECK-NEXT:    [[A:%.*]] = ashr exact i32 [[X:%.*]], 3
-; CHECK-NEXT:    [[RES:%.*]] = mul nuw i32 [[A]], 9
+; CHECK-NEXT:    [[TMP1:%.*]] = lshr exact i32 [[X:%.*]], 3
+; CHECK-NEXT:    [[RES:%.*]] = add nuw i32 [[TMP1]], [[X]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = ashr exact i32 %x, 3
@@ -887,7 +887,7 @@ define i32 @ashr_shift_mul_nuw(i32 %x) {
 define i32 @ashr_shift_mul_nsw(i32 %x) {
 ; CHECK-LABEL: @ashr_shift_mul_nsw(
 ; CHECK-NEXT:    [[A:%.*]] = ashr exact i32 [[X:%.*]], 3
-; CHECK-NEXT:    [[RES:%.*]] = mul nsw i32 [[A]], 9
+; CHECK-NEXT:    [[RES:%.*]] = add nsw i32 [[A]], [[X]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = ashr exact i32 %x, 3
@@ -898,7 +898,7 @@ define i32 @ashr_shift_mul_nsw(i32 %x) {
 define i32 @lshr_shift_mul_nuw(i32 %x) {
 ; CHECK-LABEL: @lshr_shift_mul_nuw(
 ; CHECK-NEXT:    [[A:%.*]] = lshr exact i32 [[X:%.*]], 3
-; CHECK-NEXT:    [[RES:%.*]] = mul nuw i32 [[A]], 9
+; CHECK-NEXT:    [[RES:%.*]] = add nuw i32 [[A]], [[X]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = lshr exact i32 %x, 3
@@ -920,7 +920,7 @@ define i32 @lshr_shift_mul(i32 %x) {
 define i32 @lshr_shift_mul_nsw(i32 %x) {
 ; CHECK-LABEL: @lshr_shift_mul_nsw(
 ; CHECK-NEXT:    [[A:%.*]] = lshr exact i32 [[X:%.*]], 3
-; CHECK-NEXT:    [[RES:%.*]] = mul nuw nsw i32 [[A]], 9
+; CHECK-NEXT:    [[RES:%.*]] = add nsw i32 [[A]], [[X]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = lshr exact i32 %x, 3
@@ -954,13 +954,11 @@ define i32 @ashr_no_exact(i32 %x) {
   ret i32 %res
 }
 
-; Negative test
-
 define i32 @lshr_multiuse(i32 %x) {
 ; CHECK-LABEL: @lshr_multiuse(
 ; CHECK-NEXT:    [[A:%.*]] = lshr exact i32 [[X:%.*]], 3
 ; CHECK-NEXT:    call void @use(i32 [[A]])
-; CHECK-NEXT:    [[RES:%.*]] = mul nuw nsw i32 [[A]], 9
+; CHECK-NEXT:    [[RES:%.*]] = add nsw i32 [[A]], [[X]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = lshr exact i32 %x, 3
@@ -969,13 +967,42 @@ define i32 @lshr_multiuse(i32 %x) {
   ret i32 %res
 }
 
+
+; Negative test
+
+define i32 @lshr_multiuse_no_flags(i32 %x) {
+; CHECK-LABEL: @lshr_multiuse_no_flags(
+; CHECK-NEXT:    [[A:%.*]] = lshr exact i32 [[X:%.*]], 3
+; CHECK-NEXT:    call void @use(i32 [[A]])
+; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[A]], 9
+; CHECK-NEXT:    ret i32 [[RES]]
+;
+  %a = lshr exact i32 %x, 3
+  call void @use(i32 %a)
+  %res = mul i32 %a, 9
+  ret i32 %res
+}
+
 ; Negative test
 
+define i32 @ashr_multiuse_no_flags(i32 %x) {
+; CHECK-LABEL: @ashr_multiuse_no_flags(
+; CHECK-NEXT:    [[A:%.*]] = ashr exact i32 [[X:%.*]], 3
+; CHECK-NEXT:    call void @use(i32 [[A]])
+; CHECK-NEXT:    [[RES:%.*]] = mul i32 [[A]], 9
+; CHECK-NEXT:    ret i32 [[RES]]
+;
+  %a = ashr exact i32 %x, 3
+  call void @use(i32 %a)
+  %res = mul i32 %a, 9
+  ret i32 %res
+}
+
 define i32 @ashr_multiuse(i32 %x) {
 ; CHECK-LABEL: @ashr_multiuse(
 ; CHECK-NEXT:    [[A:%.*]] = ashr exact i32 [[X:%.*]], 3
 ; CHECK-NEXT:    call void @use(i32 [[A]])
-; CHECK-NEXT:    [[RES:%.*]] = mul nsw i32 [[A]], 9
+; CHECK-NEXT:    [[RES:%.*]] = add nsw i32 [[A]], [[X]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = ashr exact i32 %x, 3