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1 parent 82ef4ee commit 1c87083Copy full SHA for 1c87083
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -10888,8 +10888,8 @@ SDValue DAGCombiner::visitSRA(SDNode *N) {
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// on that type, and the truncate to that type is both legal and free,
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// perform the transform.
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if ((ShiftAmt > 0) &&
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- TLI.isOperationLegalOrCustom(ISD::SIGN_EXTEND, TruncVT) &&
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- TLI.isOperationLegalOrCustom(ISD::TRUNCATE, VT) &&
+ TLI.isOperationLegalOrCustom(ISD::SIGN_EXTEND, VT) &&
+ TLI.isOperationLegalOrCustom(ISD::TRUNCATE, TruncVT) &&
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TLI.isTruncateFree(VT, TruncVT)) {
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SDValue Amt = DAG.getShiftAmountConstant(ShiftAmt, VT, DL);
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SDValue Shift = DAG.getNode(ISD::SRL, DL, VT,
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