@@ -2388,27 +2388,21 @@ def INT_PTX_LDG_G_v4f32_ELE : VLDG_G_ELE_V4<"f32", Float32Regs>;
23882388
23892389
23902390multiclass NG_TO_G<string Str, bit Supports32 = 1, list<Predicate> Preds = []> {
2391- foreach bitwidth = !if(Supports32, ["32", "64"], ["64"]) in {
2392- if !eq(bitwidth, "32") then {
2393- def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
2394- "cvta." # Str # ".u32 \t$result, $src;", []>, Requires<Preds>;
2395- } else if !eq(bitwidth, "64") then {
2396- def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
2397- "cvta." # Str # ".u64 \t$result, $src;", []>, Requires<Preds>;
2398- }
2399- }
2391+ if Supports32 then
2392+ def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
2393+ "cvta." # Str # ".u32 \t$result, $src;", []>, Requires<Preds>;
2394+
2395+ def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
2396+ "cvta." # Str # ".u64 \t$result, $src;", []>, Requires<Preds>;
24002397}
24012398
24022399multiclass G_TO_NG<string Str, bit Supports32 = 1, list<Predicate> Preds = []> {
2403- foreach bitwidth = !if(Supports32, ["32", "64"], ["64"]) in {
2404- if !eq(bitwidth, "32") then {
2405- def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
2406- "cvta.to." # Str # ".u32 \t$result, $src;", []>, Requires<Preds>;
2407- } else if !eq(bitwidth, "64") then {
2408- def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
2409- "cvta.to." # Str # ".u64 \t$result, $src;", []>, Requires<Preds>;
2410- }
2411- }
2400+ if Supports32 then
2401+ def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
2402+ "cvta.to." # Str # ".u32 \t$result, $src;", []>, Requires<Preds>;
2403+
2404+ def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
2405+ "cvta.to." # Str # ".u64 \t$result, $src;", []>, Requires<Preds>;
24122406}
24132407
24142408foreach space = ["local", "shared", "global", "const", "param"] in {
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