@@ -2775,45 +2775,41 @@ static bool interp__builtin_blend(InterpState &S, CodePtr OpPC,
27752775
27762776enum class Half { None, Low, High };
27772777
2778- static bool interp__builtin_ia32_pshuf (InterpState &S, CodePtr OpPC, const CallExpr *Call,
2779- Half whichHalf) {
2778+ static bool interp__builtin_ia32_pshuf (InterpState &S, CodePtr OpPC,
2779+ const CallExpr *Call, Half whichHalf) {
27802780 assert (Call->getNumArgs () == 2 && " masked forms handled via select*" );
27812781 APSInt ControlImm = popToAPSInt (S, Call->getArg (1 ));
27822782 const Pointer &Src = S.Stk .pop <Pointer>();
27832783 const Pointer &Dst = S.Stk .peek <Pointer>();
27842784
27852785 unsigned NumElems = Dst.getNumElems ();
2786- PrimType ElemT = Dst.getFieldDesc ()->getPrimType ();
2786+ PrimType ElemT = Dst.getFieldDesc ()->getPrimType ();
27872787
2788- // Only i16/i32 supported
27892788 unsigned ElemBits = static_cast <unsigned >(primSize (ElemT) * 8 );
2790- if (ElemBits != 16 && ElemBits != 32 ) return false ;
2789+ if (ElemBits != 16 && ElemBits != 32 )
2790+ return false ;
27912791
2792- // Lane: 64b for MMX, 128b otherwise
27932792 unsigned TotalBits = NumElems * ElemBits;
2794- unsigned LaneBits = (TotalBits == 64 ) ? 64u : 128u ;
2795- unsigned LaneElts = LaneBits / ElemBits;
2793+ unsigned LaneBits = (TotalBits == 64 ) ? 64u : 128u ;
2794+ unsigned LaneElts = LaneBits / ElemBits;
27962795 assert (LaneElts && (NumElems % LaneElts == 0 ));
27972796
27982797 uint8_t ctl = static_cast <uint8_t >(ControlImm.getZExtValue ());
27992798
28002799 for (unsigned idx = 0 ; idx != NumElems; idx++) {
28012800 unsigned LaneBase = (idx / LaneElts) * LaneElts;
2802- unsigned LaneIdx = idx % LaneElts;
2801+ unsigned LaneIdx = idx % LaneElts;
28032802
2804- unsigned SrcIdx = idx;
2803+ unsigned SrcIdx = idx;
28052804
28062805 if (ElemBits == 32 ) {
2807- // PSHUFD: 4×i32 per lane
28082806 unsigned sel = (ctl >> (2 * LaneIdx)) & 0x3 ;
28092807 SrcIdx = LaneBase + sel;
2810- } else { // 16-bit shuffles
2808+ } else {
28112809 if (LaneElts == 4 ) {
2812- // MMX: permute all 4×i16
28132810 unsigned sel = (ctl >> (2 * LaneIdx)) & 0x3 ;
28142811 SrcIdx = LaneBase + sel;
28152812 } else {
2816- // 128b lanes: shuffle 4×i16 half
28172813 constexpr unsigned HalfSize = 4 ;
28182814 if (whichHalf == Half::Low && LaneIdx < HalfSize) {
28192815 unsigned sel = (ctl >> (2 * LaneIdx)) & 0x3 ;
0 commit comments