AMDGPU: Use pointer types more consistently (#111651)

This was using addrspace 0 and 1 pointers interchangably. This works
out since they happen to use the same size, but consistently query
or use the correct one.

Author: arsenm

llvm/lib/Target/AMDGPU/AMDGPUCtorDtorLowering.cpp

@@ -77,23 +77,22 @@ static void createInitOrFiniCalls(Function &F, bool IsCtor) {
   auto *LoopBB = BasicBlock::Create(C, "while.entry", &F);
   auto *ExitBB = BasicBlock::Create(C, "while.end", &F);
   Type *PtrTy = IRB.getPtrTy(AMDGPUAS::GLOBAL_ADDRESS);
+  ArrayType *PtrArrayTy = ArrayType::get(PtrTy, 0);
 
   auto *Begin = M.getOrInsertGlobal(
-      IsCtor ? "__init_array_start" : "__fini_array_start",
-      ArrayType::get(PtrTy, 0), [&]() {
+      IsCtor ? "__init_array_start" : "__fini_array_start", PtrArrayTy, [&]() {
         return new GlobalVariable(
-            M, ArrayType::get(PtrTy, 0),
+            M, PtrArrayTy,
             /*isConstant=*/true, GlobalValue::ExternalLinkage,
             /*Initializer=*/nullptr,
             IsCtor ? "__init_array_start" : "__fini_array_start",
             /*InsertBefore=*/nullptr, GlobalVariable::NotThreadLocal,
             /*AddressSpace=*/AMDGPUAS::GLOBAL_ADDRESS);
       });
   auto *End = M.getOrInsertGlobal(
-      IsCtor ? "__init_array_end" : "__fini_array_end",
-      ArrayType::get(PtrTy, 0), [&]() {
+      IsCtor ? "__init_array_end" : "__fini_array_end", PtrArrayTy, [&]() {
         return new GlobalVariable(
-            M, ArrayType::get(PtrTy, 0),
+            M, PtrArrayTy,
             /*isConstant=*/true, GlobalValue::ExternalLinkage,
             /*Initializer=*/nullptr,
             IsCtor ? "__init_array_end" : "__fini_array_end",
@@ -117,7 +116,7 @@ static void createInitOrFiniCalls(Function &F, bool IsCtor) {
     auto *Size = IRB.CreateAShr(ByteSize, ConstantInt::get(Int64Ty, 3));
     auto *Offset = IRB.CreateSub(Size, ConstantInt::get(Int64Ty, 1));
     Start = IRB.CreateInBoundsGEP(
-        ArrayType::get(IRB.getPtrTy(), 0), Begin,
+        PtrArrayTy, Begin,
         ArrayRef<Value *>({ConstantInt::get(Int64Ty, 0), Offset}));
     Stop = Begin;
   }
@@ -128,8 +127,7 @@ static void createInitOrFiniCalls(Function &F, bool IsCtor) {
       LoopBB, ExitBB);
   IRB.SetInsertPoint(LoopBB);
   auto *CallBackPHI = IRB.CreatePHI(PtrTy, 2, "ptr");
-  auto *CallBack = IRB.CreateLoad(IRB.getPtrTy(F.getAddressSpace()),
-                                  CallBackPHI, "callback");
+  auto *CallBack = IRB.CreateLoad(F.getType(), CallBackPHI, "callback");
   IRB.CreateCall(CallBackTy, CallBack);
   auto *NewCallBack =
       IRB.CreateConstGEP1_64(PtrTy, CallBackPHI, IsCtor ? 1 : -1, "next");

llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-constexpr-alias.ll

@@ -66,7 +66,7 @@ define void @bar() addrspace(1) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = ashr i64 sub (i64 ptrtoint (ptr addrspace(1) @__fini_array_end to i64), i64 ptrtoint (ptr addrspace(1) @__fini_array_start to i64)), 3
 ; CHECK-NEXT:    [[TMP1:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [0 x ptr], ptr addrspace(1) @__fini_array_start, i64 0, i64 [[TMP1]]
+; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [0 x ptr addrspace(1)], ptr addrspace(1) @__fini_array_start, i64 0, i64 [[TMP1]]
 ; CHECK-NEXT:    [[TMP3:%.*]] = icmp uge ptr addrspace(1) [[TMP2]], @__fini_array_start
 ; CHECK-NEXT:    br i1 [[TMP3]], label [[WHILE_ENTRY:%.*]], label [[WHILE_END:%.*]]
 ; CHECK:       while.entry:

llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll

@@ -81,7 +81,7 @@ define internal void @bar() {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = ashr i64 sub (i64 ptrtoint (ptr addrspace(1) @__fini_array_end to i64), i64 ptrtoint (ptr addrspace(1) @__fini_array_start to i64)), 3
 ; CHECK-NEXT:    [[TMP1:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [0 x ptr], ptr addrspace(1) @__fini_array_start, i64 0, i64 [[TMP1]]
+; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [0 x ptr addrspace(1)], ptr addrspace(1) @__fini_array_start, i64 0, i64 [[TMP1]]
 ; CHECK-NEXT:    [[TMP3:%.*]] = icmp uge ptr addrspace(1) [[TMP2]], @__fini_array_start
 ; CHECK-NEXT:    br i1 [[TMP3]], label [[WHILE_ENTRY:%.*]], label [[WHILE_END:%.*]]
 ; CHECK:       while.entry:

llvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll

@@ -73,7 +73,7 @@ define internal void @bar.5() {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = ashr i64 sub (i64 ptrtoint (ptr addrspace(1) @__fini_array_end to i64), i64 ptrtoint (ptr addrspace(1) @__fini_array_start to i64)), 3
 ; CHECK-NEXT:    [[TMP1:%.*]] = sub i64 [[TMP0]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [0 x ptr], ptr addrspace(1) @__fini_array_start, i64 0, i64 [[TMP1]]
+; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [0 x ptr addrspace(1)], ptr addrspace(1) @__fini_array_start, i64 0, i64 [[TMP1]]
 ; CHECK-NEXT:    [[TMP3:%.*]] = icmp uge ptr addrspace(1) [[TMP2]], @__fini_array_start
 ; CHECK-NEXT:    br i1 [[TMP3]], label [[WHILE_ENTRY:%.*]], label [[WHILE_END:%.*]]
 ; CHECK:       while.entry: