@@ -3411,7 +3411,6 @@ void SIInstrInfo::insertSelect(MachineBasicBlock &MBB,
34113411bool SIInstrInfo::isFoldableCopy (const MachineInstr &MI) {
34123412 switch (MI.getOpcode ()) {
34133413 case AMDGPU::V_MOV_B16_t16_e32:
3414- case AMDGPU::V_MOV_B16_t16_e64:
34153414 case AMDGPU::V_MOV_B32_e32:
34163415 case AMDGPU::V_MOV_B32_e64:
34173416 case AMDGPU::V_MOV_B64_PSEUDO:
@@ -3428,34 +3427,10 @@ bool SIInstrInfo::isFoldableCopy(const MachineInstr &MI) {
34283427 case AMDGPU::AV_MOV_B32_IMM_PSEUDO:
34293428 case AMDGPU::AV_MOV_B64_IMM_PSEUDO:
34303429 return true ;
3431- default :
3432- return false ;
3433- }
3434- }
3435-
3436- unsigned SIInstrInfo::getFoldableCopySrcIdx (const MachineInstr &MI) {
3437- switch (MI.getOpcode ()) {
3438- case AMDGPU::V_MOV_B16_t16_e32:
34393430 case AMDGPU::V_MOV_B16_t16_e64:
3440- return 2 ;
3441- case AMDGPU::V_MOV_B32_e32:
3442- case AMDGPU::V_MOV_B32_e64:
3443- case AMDGPU::V_MOV_B64_PSEUDO:
3444- case AMDGPU::V_MOV_B64_e32:
3445- case AMDGPU::V_MOV_B64_e64:
3446- case AMDGPU::S_MOV_B32:
3447- case AMDGPU::S_MOV_B64:
3448- case AMDGPU::S_MOV_B64_IMM_PSEUDO:
3449- case AMDGPU::COPY:
3450- case AMDGPU::WWM_COPY:
3451- case AMDGPU::V_ACCVGPR_WRITE_B32_e64:
3452- case AMDGPU::V_ACCVGPR_READ_B32_e64:
3453- case AMDGPU::V_ACCVGPR_MOV_B32:
3454- case AMDGPU::AV_MOV_B32_IMM_PSEUDO:
3455- case AMDGPU::AV_MOV_B64_IMM_PSEUDO:
3456- return 1 ;
3431+ return !hasAnyModifiersSet (MI);
34573432 default :
3458- llvm_unreachable ( " MI is not a foldable copy " ) ;
3433+ return false ;
34593434 }
34603435}
34613436
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