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Used m_SExtLike matchers.
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2 files changed

+31
-4
lines changed

2 files changed

+31
-4
lines changed

llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2808,8 +2808,8 @@ Instruction *InstCombinerImpl::visitSub(BinaryOperator &I) {
28082808
return Res;
28092809

28102810
// (sub (sext (add nsw (X, Y)), sext (X))) --> (sext (Y))
2811-
if (match(Op1, m_SExt(m_Value(X))) &&
2812-
match(Op0, m_SExt(m_c_NSWAdd(m_Specific(X), m_Value(Y))))) {
2811+
if (match(Op1, m_SExtLike(m_Value(X))) &&
2812+
match(Op0, m_SExtLike(m_c_NSWAdd(m_Specific(X), m_Value(Y))))) {
28132813
Value *SExtY = Builder.CreateSExt(Y, I.getType());
28142814
return replaceInstUsesWith(I, SExtY);
28152815
}
@@ -2818,8 +2818,8 @@ Instruction *InstCombinerImpl::visitSub(BinaryOperator &I) {
28182818
// --> (sub[ nsw] (sext (Y), sext(Z)))
28192819
{
28202820
Value *Z, *Add0, *Add1;
2821-
if (match(Op0, m_SExt(m_Value(Add0))) &&
2822-
match(Op1, m_SExt(m_Value(Add1))) &&
2821+
if (match(Op0, m_SExtLike(m_Value(Add0))) &&
2822+
match(Op1, m_SExtLike(m_Value(Add1))) &&
28232823
((match(Add0, m_NSWAdd(m_Value(X), m_Value(Y))) &&
28242824
match(Add1, m_c_NSWAdd(m_Specific(X), m_Value(Z)))) ||
28252825
(match(Add0, m_NSWAdd(m_Value(Y), m_Value(X))) &&

llvm/test/Transforms/InstCombine/sub-sext-add.ll

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -61,6 +61,21 @@ define i64 @src_2add_2sext_sub_4(i32 %x, i32 %y, i32 %z) {
6161
ret i64 %sub
6262
}
6363

64+
define i64 @src_2add_2sextlike_sub(i32 %x, i32 %y, i32 %z) {
65+
; CHECK-LABEL: @src_2add_2sextlike_sub(
66+
; CHECK-NEXT: [[SEXT1:%.*]] = sext i32 [[Y:%.*]] to i64
67+
; CHECK-NEXT: [[SEXT2:%.*]] = sext i32 [[Z:%.*]] to i64
68+
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 [[SEXT1]], [[SEXT2]]
69+
; CHECK-NEXT: ret i64 [[SUB]]
70+
;
71+
%add1 = add nsw i32 %x, %y
72+
%add2 = add nsw i32 %x, %z
73+
%sext1 = zext nneg i32 %add1 to i64
74+
%sext2 = zext nneg i32 %add2 to i64
75+
%sub = sub i64 %sext1, %sext2
76+
ret i64 %sub
77+
}
78+
6479
define i64 @src_2add_2sext_sub_nsw(i32 %x, i32 %y, i32 %z) {
6580
; CHECK-LABEL: @src_2add_2sext_sub_nsw(
6681
; CHECK-NEXT: [[SEXT1:%.*]] = sext i32 [[Y:%.*]] to i64
@@ -115,6 +130,18 @@ define i64 @src_x_add_2sext_sub_2(i32 %x, i32 %y) {
115130
ret i64 %sub
116131
}
117132

133+
define i64 @src_x_add_2sextlike_sub(i32 %x, i32 %y) {
134+
; CHECK-LABEL: @src_x_add_2sextlike_sub(
135+
; CHECK-NEXT: [[SUB:%.*]] = sext i32 [[Y:%.*]] to i64
136+
; CHECK-NEXT: ret i64 [[SUB]]
137+
;
138+
%add1 = add nsw i32 %x, %y
139+
%sext1 = zext nneg i32 %add1 to i64
140+
%sext2 = zext nneg i32 %x to i64
141+
%sub = sub i64 %sext1, %sext2
142+
ret i64 %sub
143+
}
144+
118145
define i64 @src_x_add_2sext_sub_nsw(i32 %x, i32 %y) {
119146
; CHECK-LABEL: @src_x_add_2sext_sub_nsw(
120147
; CHECK-NEXT: [[SUB:%.*]] = sext i32 [[Y:%.*]] to i64

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