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KanRobertKanRobert
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[X86][CodeGen] Support lowering for NDD ADD/SUB/ADC/SBB/OR/XOR/NEG/NOT/INC/DEC/IMUL (#77564)
We supported encoding/decoding for these instructions in #76319 #76721 #76919
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‎llvm/lib/Target/X86/X86InstrArithmetic.td‎

Lines changed: 76 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -1107,43 +1107,85 @@ def : Pat<(store (X86adc_flag GR64:$src, (loadi64 addr:$dst), EFLAGS),
11071107

11081108
// Patterns for basic arithmetic ops with relocImm for the immediate field.
11091109
multiclass ArithBinOp_RF_relocImm_Pats<SDNode OpNodeFlag, SDNode OpNode> {
1110-
def : Pat<(OpNodeFlag GR8:$src1, relocImm8_su:$src2),
1111-
(!cast<Instruction>(NAME#"8ri") GR8:$src1, relocImm8_su:$src2)>;
1112-
def : Pat<(OpNodeFlag GR16:$src1, relocImm16_su:$src2),
1113-
(!cast<Instruction>(NAME#"16ri") GR16:$src1, relocImm16_su:$src2)>;
1114-
def : Pat<(OpNodeFlag GR32:$src1, relocImm32_su:$src2),
1115-
(!cast<Instruction>(NAME#"32ri") GR32:$src1, relocImm32_su:$src2)>;
1116-
def : Pat<(OpNodeFlag GR64:$src1, i64relocImmSExt32_su:$src2),
1117-
(!cast<Instruction>(NAME#"64ri32") GR64:$src1, i64relocImmSExt32_su:$src2)>;
1118-
1119-
def : Pat<(store (OpNode (load addr:$dst), relocImm8_su:$src), addr:$dst),
1120-
(!cast<Instruction>(NAME#"8mi") addr:$dst, relocImm8_su:$src)>;
1121-
def : Pat<(store (OpNode (load addr:$dst), relocImm16_su:$src), addr:$dst),
1122-
(!cast<Instruction>(NAME#"16mi") addr:$dst, relocImm16_su:$src)>;
1123-
def : Pat<(store (OpNode (load addr:$dst), relocImm32_su:$src), addr:$dst),
1124-
(!cast<Instruction>(NAME#"32mi") addr:$dst, relocImm32_su:$src)>;
1125-
def : Pat<(store (OpNode (load addr:$dst), i64relocImmSExt32_su:$src), addr:$dst),
1126-
(!cast<Instruction>(NAME#"64mi32") addr:$dst, i64relocImmSExt32_su:$src)>;
1110+
let Predicates = [NoNDD] in {
1111+
def : Pat<(OpNodeFlag GR8:$src1, relocImm8_su:$src2),
1112+
(!cast<Instruction>(NAME#"8ri") GR8:$src1, relocImm8_su:$src2)>;
1113+
def : Pat<(OpNodeFlag GR16:$src1, relocImm16_su:$src2),
1114+
(!cast<Instruction>(NAME#"16ri") GR16:$src1, relocImm16_su:$src2)>;
1115+
def : Pat<(OpNodeFlag GR32:$src1, relocImm32_su:$src2),
1116+
(!cast<Instruction>(NAME#"32ri") GR32:$src1, relocImm32_su:$src2)>;
1117+
def : Pat<(OpNodeFlag GR64:$src1, i64relocImmSExt32_su:$src2),
1118+
(!cast<Instruction>(NAME#"64ri32") GR64:$src1, i64relocImmSExt32_su:$src2)>;
1119+
1120+
def : Pat<(store (OpNode (load addr:$dst), relocImm8_su:$src), addr:$dst),
1121+
(!cast<Instruction>(NAME#"8mi") addr:$dst, relocImm8_su:$src)>;
1122+
def : Pat<(store (OpNode (load addr:$dst), relocImm16_su:$src), addr:$dst),
1123+
(!cast<Instruction>(NAME#"16mi") addr:$dst, relocImm16_su:$src)>;
1124+
def : Pat<(store (OpNode (load addr:$dst), relocImm32_su:$src), addr:$dst),
1125+
(!cast<Instruction>(NAME#"32mi") addr:$dst, relocImm32_su:$src)>;
1126+
def : Pat<(store (OpNode (load addr:$dst), i64relocImmSExt32_su:$src), addr:$dst),
1127+
(!cast<Instruction>(NAME#"64mi32") addr:$dst, i64relocImmSExt32_su:$src)>;
1128+
}
1129+
let Predicates = [HasNDD] in {
1130+
def : Pat<(OpNodeFlag GR8:$src1, relocImm8_su:$src2),
1131+
(!cast<Instruction>(NAME#"8ri_ND") GR8:$src1, relocImm8_su:$src2)>;
1132+
def : Pat<(OpNodeFlag GR16:$src1, relocImm16_su:$src2),
1133+
(!cast<Instruction>(NAME#"16ri_ND") GR16:$src1, relocImm16_su:$src2)>;
1134+
def : Pat<(OpNodeFlag GR32:$src1, relocImm32_su:$src2),
1135+
(!cast<Instruction>(NAME#"32ri_ND") GR32:$src1, relocImm32_su:$src2)>;
1136+
def : Pat<(OpNodeFlag GR64:$src1, i64relocImmSExt32_su:$src2),
1137+
(!cast<Instruction>(NAME#"64ri32_ND") GR64:$src1, i64relocImmSExt32_su:$src2)>;
1138+
1139+
def : Pat<(OpNode (load addr:$dst), relocImm8_su:$src),
1140+
(!cast<Instruction>(NAME#"8mi_ND") addr:$dst, relocImm8_su:$src)>;
1141+
def : Pat<(OpNode (load addr:$dst), relocImm16_su:$src),
1142+
(!cast<Instruction>(NAME#"16mi_ND") addr:$dst, relocImm16_su:$src)>;
1143+
def : Pat<(OpNode (load addr:$dst), relocImm32_su:$src),
1144+
(!cast<Instruction>(NAME#"32mi_ND") addr:$dst, relocImm32_su:$src)>;
1145+
def : Pat<(OpNode (load addr:$dst), i64relocImmSExt32_su:$src),
1146+
(!cast<Instruction>(NAME#"64mi32_ND") addr:$dst, i64relocImmSExt32_su:$src)>;
1147+
}
11271148
}
11281149

11291150
multiclass ArithBinOp_RFF_relocImm_Pats<SDNode OpNodeFlag> {
1130-
def : Pat<(OpNodeFlag GR8:$src1, relocImm8_su:$src2, EFLAGS),
1131-
(!cast<Instruction>(NAME#"8ri") GR8:$src1, relocImm8_su:$src2)>;
1132-
def : Pat<(OpNodeFlag GR16:$src1, relocImm16_su:$src2, EFLAGS),
1133-
(!cast<Instruction>(NAME#"16ri") GR16:$src1, relocImm16_su:$src2)>;
1134-
def : Pat<(OpNodeFlag GR32:$src1, relocImm32_su:$src2, EFLAGS),
1135-
(!cast<Instruction>(NAME#"32ri") GR32:$src1, relocImm32_su:$src2)>;
1136-
def : Pat<(OpNodeFlag GR64:$src1, i64relocImmSExt32_su:$src2, EFLAGS),
1137-
(!cast<Instruction>(NAME#"64ri32") GR64:$src1, i64relocImmSExt32_su:$src2)>;
1138-
1139-
def : Pat<(store (OpNodeFlag (load addr:$dst), relocImm8_su:$src, EFLAGS), addr:$dst),
1140-
(!cast<Instruction>(NAME#"8mi") addr:$dst, relocImm8_su:$src)>;
1141-
def : Pat<(store (OpNodeFlag (load addr:$dst), relocImm16_su:$src, EFLAGS), addr:$dst),
1142-
(!cast<Instruction>(NAME#"16mi") addr:$dst, relocImm16_su:$src)>;
1143-
def : Pat<(store (OpNodeFlag (load addr:$dst), relocImm32_su:$src, EFLAGS), addr:$dst),
1144-
(!cast<Instruction>(NAME#"32mi") addr:$dst, relocImm32_su:$src)>;
1145-
def : Pat<(store (OpNodeFlag (load addr:$dst), i64relocImmSExt32_su:$src, EFLAGS), addr:$dst),
1146-
(!cast<Instruction>(NAME#"64mi32") addr:$dst, i64relocImmSExt32_su:$src)>;
1151+
let Predicates = [NoNDD] in {
1152+
def : Pat<(OpNodeFlag GR8:$src1, relocImm8_su:$src2, EFLAGS),
1153+
(!cast<Instruction>(NAME#"8ri") GR8:$src1, relocImm8_su:$src2)>;
1154+
def : Pat<(OpNodeFlag GR16:$src1, relocImm16_su:$src2, EFLAGS),
1155+
(!cast<Instruction>(NAME#"16ri") GR16:$src1, relocImm16_su:$src2)>;
1156+
def : Pat<(OpNodeFlag GR32:$src1, relocImm32_su:$src2, EFLAGS),
1157+
(!cast<Instruction>(NAME#"32ri") GR32:$src1, relocImm32_su:$src2)>;
1158+
def : Pat<(OpNodeFlag GR64:$src1, i64relocImmSExt32_su:$src2, EFLAGS),
1159+
(!cast<Instruction>(NAME#"64ri32") GR64:$src1, i64relocImmSExt32_su:$src2)>;
1160+
1161+
def : Pat<(store (OpNodeFlag (load addr:$dst), relocImm8_su:$src, EFLAGS), addr:$dst),
1162+
(!cast<Instruction>(NAME#"8mi") addr:$dst, relocImm8_su:$src)>;
1163+
def : Pat<(store (OpNodeFlag (load addr:$dst), relocImm16_su:$src, EFLAGS), addr:$dst),
1164+
(!cast<Instruction>(NAME#"16mi") addr:$dst, relocImm16_su:$src)>;
1165+
def : Pat<(store (OpNodeFlag (load addr:$dst), relocImm32_su:$src, EFLAGS), addr:$dst),
1166+
(!cast<Instruction>(NAME#"32mi") addr:$dst, relocImm32_su:$src)>;
1167+
def : Pat<(store (OpNodeFlag (load addr:$dst), i64relocImmSExt32_su:$src, EFLAGS), addr:$dst),
1168+
(!cast<Instruction>(NAME#"64mi32") addr:$dst, i64relocImmSExt32_su:$src)>;
1169+
}
1170+
let Predicates = [HasNDD] in {
1171+
def : Pat<(OpNodeFlag GR8:$src1, relocImm8_su:$src2, EFLAGS),
1172+
(!cast<Instruction>(NAME#"8ri_ND") GR8:$src1, relocImm8_su:$src2)>;
1173+
def : Pat<(OpNodeFlag GR16:$src1, relocImm16_su:$src2, EFLAGS),
1174+
(!cast<Instruction>(NAME#"16ri_ND") GR16:$src1, relocImm16_su:$src2)>;
1175+
def : Pat<(OpNodeFlag GR32:$src1, relocImm32_su:$src2, EFLAGS),
1176+
(!cast<Instruction>(NAME#"32ri_ND") GR32:$src1, relocImm32_su:$src2)>;
1177+
def : Pat<(OpNodeFlag GR64:$src1, i64relocImmSExt32_su:$src2, EFLAGS),
1178+
(!cast<Instruction>(NAME#"64ri32_ND") GR64:$src1, i64relocImmSExt32_su:$src2)>;
1179+
1180+
def : Pat<(OpNodeFlag (load addr:$dst), relocImm8_su:$src, EFLAGS),
1181+
(!cast<Instruction>(NAME#"8mi_ND") addr:$dst, relocImm8_su:$src)>;
1182+
def : Pat<(OpNodeFlag (load addr:$dst), relocImm16_su:$src, EFLAGS),
1183+
(!cast<Instruction>(NAME#"16mi_ND") addr:$dst, relocImm16_su:$src)>;
1184+
def : Pat<(OpNodeFlag (load addr:$dst), relocImm32_su:$src, EFLAGS),
1185+
(!cast<Instruction>(NAME#"32mi_ND") addr:$dst, relocImm32_su:$src)>;
1186+
def : Pat<(OpNodeFlag (load addr:$dst), i64relocImmSExt32_su:$src, EFLAGS),
1187+
(!cast<Instruction>(NAME#"64mi32_ND") addr:$dst, i64relocImmSExt32_su:$src)>;
1188+
}
11471189
}
11481190

11491191
multiclass ArithBinOp_F_relocImm_Pats<SDNode OpNodeFlag> {

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