Use set of sources

Author: HolyMolyCowMan

llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp

@@ -43,7 +43,7 @@
 #include "llvm/CodeGenTypes/MachineValueType.h"
 #include "llvm/Support/Debug.h"
 #include <cassert>
-#include <iostream>
+#include <set>
 
 #define GET_GICOMBINER_DEPS
 #include "AArch64GenPostLegalizeGICombiner.inc"
@@ -146,6 +146,8 @@ bool matchCombineBuildUnmerge(MachineInstr &MI, MachineRegisterInfo &MRI,
   undefinedValues.clear();
   unmergedValues.clear();
 
+  std::set<int> knownRegs;
+
   for (auto Use : MI.all_uses()) {
     auto *Def = getDefIgnoringCopies(Use.getReg(), MRI);
 
@@ -170,15 +172,19 @@ bool matchCombineBuildUnmerge(MachineInstr &MI, MachineRegisterInfo &MRI,
         unmergedValues.clear();
         return false;
       }
-
-      unmergedValues.push_back(Def->getOperand(2).getReg());
+      if (knownRegs.find(Def->getOperand(2).getReg().id()) == knownRegs.end()) {
+        knownRegs.insert(Def->getOperand(2).getReg().id());
+        unmergedValues.push_back(Def->getOperand(2).getReg());
+      } 
+      else
+        continue;
 
       break;
     }
   }
 
-  if (!(undefinedValues.size() == 2 && unmergedValues.size() == 2) &&
-      !(undefinedValues.size() == 0 && unmergedValues.size() == 4)) {
+  if (!(undefinedValues.size() == 2 && unmergedValues.size() == 1) &&
+      !(undefinedValues.size() == 0 && unmergedValues.size() == 2)) {
     undefinedValues.clear();
     unmergedValues.clear();
     return false;
@@ -193,7 +199,7 @@ void applyCombineBuildUnmerge(MachineInstr &MI, MachineRegisterInfo &MRI,
                               SmallVectorImpl<Register> &undefinedValues) {
   B.setInstrAndDebugLoc(MI);
 
-  if (unmergedValues.size() == 2) {
+  if (unmergedValues.size() == 1) {
     auto llt = LLT::fixed_vector(
         undefinedValues.size(),
         LLT::scalar(MRI.getType(unmergedValues[0]).getScalarSizeInBits()));
@@ -202,8 +208,9 @@ void applyCombineBuildUnmerge(MachineInstr &MI, MachineRegisterInfo &MRI,
     B.buildBuildVector(DefVec, undefinedValues);
     B.buildConcatVectors(MI.getOperand(0), {unmergedValues[0], DefVec});
   } else {
+    return;
     B.buildConcatVectors(MI.getOperand(0),
-                         {unmergedValues[0], unmergedValues[3]});
+                         {unmergedValues[0], unmergedValues[1]});
   }
 
   MI.eraseFromParent();

llvm/test/CodeGen/AArch64/arm64-neon-copy.ll

@@ -1268,17 +1268,11 @@ define <8 x i16> @testDUP.v1i16(<1 x i16> %a) {
 }
 
 define <4 x i32> @testDUP.v1i32(<1 x i32> %a) {
-; CHECK-SD-LABEL: testDUP.v1i32:
-; CHECK-SD:       // %bb.0:
-; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-SD-NEXT:    dup v0.4s, v0.s[0]
-; CHECK-SD-NEXT:    ret
-;
-; CHECK-GI-LABEL: testDUP.v1i32:
-; CHECK-GI:       // %bb.0:
-; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-GI-NEXT:    mov v0.d[1], v0.d[0]
-; CHECK-GI-NEXT:    ret
+; CHECK-LABEL: testDUP.v1i32:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    dup v0.4s, v0.s[0]
+; CHECK-NEXT:    ret
   %b = extractelement <1 x i32> %a, i32 0
   %c = insertelement <4 x i32> undef, i32 %b, i32 0
   %d = insertelement <4 x i32> %c, i32 %b, i32 1
@@ -2249,17 +2243,11 @@ define <4 x i16> @concat_vector_v4i16(<1 x i16> %a) {
 }
 
 define <4 x i32> @concat_vector_v4i32(<1 x i32> %a) {
-; CHECK-SD-LABEL: concat_vector_v4i32:
-; CHECK-SD:       // %bb.0:
-; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-SD-NEXT:    dup v0.4s, v0.s[0]
-; CHECK-SD-NEXT:    ret
-;
-; CHECK-GI-LABEL: concat_vector_v4i32:
-; CHECK-GI:       // %bb.0:
-; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
-; CHECK-GI-NEXT:    mov v0.d[1], v0.d[0]
-; CHECK-GI-NEXT:    ret
+; CHECK-LABEL: concat_vector_v4i32:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    dup v0.4s, v0.s[0]
+; CHECK-NEXT:    ret
  %r = shufflevector <1 x i32> %a, <1 x i32> undef, <4 x i32> zeroinitializer
  ret <4 x i32> %r
 }