Skip to content

Commit 21ab523

Browse files
IgWod-IMGIgWod-IMG
authored
[mlir][spirv] Enable validation of decorations target tests (#165229)
The Intel Cache Control tests are separated and not validated as `spirv-val` fails with: "ID '7' decorated with CacheControlLoadINTEL multiple times is not allowed". However, Intel extension does allow duplicated decoration if cache level in each annotation is different. It seems that `spirv-val` does not currently support it.
1 parent 7bb0d96 commit 21ab523

File tree

2 files changed

+61
-58
lines changed

2 files changed

+61
-58
lines changed

‎mlir/test/Target/SPIRV/decorations-intel-cache-controls.mlir‎

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,42 @@
1+
// RUN: mlir-translate --no-implicit-module --split-input-file --test-spirv-roundtrip --verify-diagnostics %s | FileCheck %s
2+
3+
// CHECK-LABEL: spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
4+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
5+
spirv.func @cache_controls() "None" {
6+
// CHECK: spirv.Variable {cache_control_load_intel = [#spirv.cache_control_load_intel<cache_level = 0, load_cache_control = Uncached>, #spirv.cache_control_load_intel<cache_level = 1, load_cache_control = Cached>, #spirv.cache_control_load_intel<cache_level = 2, load_cache_control = InvalidateAfterR>]} : !spirv.ptr<f32, Function>
7+
%0 = spirv.Variable {cache_control_load_intel = [#spirv.cache_control_load_intel<cache_level = 0, load_cache_control = Uncached>, #spirv.cache_control_load_intel<cache_level = 1, load_cache_control = Cached>, #spirv.cache_control_load_intel<cache_level = 2, load_cache_control = InvalidateAfterR>]} : !spirv.ptr<f32, Function>
8+
// CHECK: spirv.Variable {cache_control_store_intel = [#spirv.cache_control_store_intel<cache_level = 0, store_cache_control = Uncached>, #spirv.cache_control_store_intel<cache_level = 1, store_cache_control = WriteThrough>, #spirv.cache_control_store_intel<cache_level = 2, store_cache_control = WriteBack>]} : !spirv.ptr<f32, Function>
9+
%1 = spirv.Variable {cache_control_store_intel = [#spirv.cache_control_store_intel<cache_level = 0, store_cache_control = Uncached>, #spirv.cache_control_store_intel<cache_level = 1, store_cache_control = WriteThrough>, #spirv.cache_control_store_intel<cache_level = 2, store_cache_control = WriteBack>]} : !spirv.ptr<f32, Function>
10+
spirv.Return
11+
}
12+
}
13+
14+
// -----
15+
16+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
17+
spirv.func @cache_controls_invalid_type() "None" {
18+
// expected-error@below {{expecting array attribute of CacheControlLoadINTEL for CacheControlLoadINTEL}}
19+
%0 = spirv.Variable {cache_control_load_intel = #spirv.cache_control_load_intel<cache_level = 0, load_cache_control = Uncached>} : !spirv.ptr<f32, Function>
20+
spirv.Return
21+
}
22+
}
23+
24+
// -----
25+
26+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
27+
spirv.func @cache_controls_invalid_type() "None" {
28+
// expected-error@below {{expecting array attribute of CacheControlStoreINTEL for CacheControlStoreINTEL}}
29+
%0 = spirv.Variable {cache_control_store_intel = [#spirv.cache_control_store_intel<cache_level = 0, store_cache_control = Uncached>, 0 : i32]} : !spirv.ptr<f32, Function>
30+
spirv.Return
31+
}
32+
}
33+
34+
// -----
35+
36+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
37+
spirv.func @cache_controls_invalid_type() "None" {
38+
// expected-error@below {{expecting non-empty array attribute of CacheControlStoreINTEL for CacheControlStoreINTEL}}
39+
%0 = spirv.Variable {cache_control_store_intel = []} : !spirv.ptr<f32, Function>
40+
spirv.Return
41+
}
42+
}

‎mlir/test/Target/SPIRV/decorations.mlir‎

Lines changed: 19 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -1,27 +1,32 @@
1-
// RUN: mlir-translate -no-implicit-module -split-input-file -test-spirv-roundtrip -verify-diagnostics %s | FileCheck %s
1+
// RUN: mlir-translate --no-implicit-module --split-input-file --test-spirv-roundtrip %s | FileCheck %s
22

3-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
3+
// RUN: %if spirv-tools %{ rm -rf %t %}
4+
// RUN: %if spirv-tools %{ mkdir %t %}
5+
// RUN: %if spirv-tools %{ mlir-translate --no-implicit-module --serialize-spirv --split-input-file --spirv-save-validation-files-with-prefix=%t/module %s %}
6+
// RUN: %if spirv-tools %{ spirv-val %t %}
7+
8+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], []> {
49
// CHECK: location = 0 : i32
510
spirv.GlobalVariable @var {location = 0 : i32} : !spirv.ptr<vector<4xf32>, Input>
611
}
712

813
// -----
914

10-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
15+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], []> {
1116
// CHECK: no_perspective
1217
spirv.GlobalVariable @var {no_perspective} : !spirv.ptr<vector<4xf32>, Input>
1318
}
1419

1520
// -----
1621

17-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
22+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], []> {
1823
// CHECK: flat
1924
spirv.GlobalVariable @var {flat} : !spirv.ptr<si32, Input>
2025
}
2126

2227
// -----
2328

24-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
29+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], [SPV_KHR_variable_pointers]> {
2530
// CHECK: aliased
2631
// CHECK: aliased
2732
spirv.GlobalVariable @var1 bind(0, 0) {aliased} : !spirv.ptr<!spirv.struct<(!spirv.array<4xf32, stride=4>[0])>, StorageBuffer>
@@ -30,28 +35,28 @@ spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
3035

3136
// -----
3237

33-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
38+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], [SPV_KHR_variable_pointers]> {
3439
// CHECK: non_readable
3540
spirv.GlobalVariable @var bind(0, 0) {non_readable} : !spirv.ptr<!spirv.struct<(!spirv.array<4xf32, stride=4>[0])>, StorageBuffer>
3641
}
3742

3843
// -----
3944

40-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
45+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], [SPV_KHR_variable_pointers]> {
4146
// CHECK: non_writable
4247
spirv.GlobalVariable @var bind(0, 0) {non_writable} : !spirv.ptr<!spirv.struct<(!spirv.array<4xf32, stride=4>[0])>, StorageBuffer>
4348
}
4449

4550
// -----
4651

47-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
52+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], [SPV_KHR_variable_pointers]> {
4853
// CHECK: restrict
4954
spirv.GlobalVariable @var bind(0, 0) {restrict} : !spirv.ptr<!spirv.struct<(!spirv.array<4xf32, stride=4>[0])>, StorageBuffer>
5055
}
5156

5257
// -----
5358

54-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
59+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], []> {
5560
// CHECK: relaxed_precision
5661
spirv.GlobalVariable @var {location = 0 : i32, relaxed_precision} : !spirv.ptr<vector<4xf32>, Output>
5762
}
@@ -84,7 +89,7 @@ spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], []> {
8489

8590
// -----
8691

87-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Kernel], []> {
92+
spirv.module Logical OpenCL requires #spirv.vce<v1.0, [Kernel, Linkage], [SPV_KHR_no_integer_wrap_decoration]> {
8893
spirv.func @iadd_decorations(%arg: i32) -> i32 "None" {
8994
// CHECK: spirv.IAdd %{{.*}}, %{{.*}} {no_signed_wrap, no_unsigned_wrap}
9095
%0 = spirv.IAdd %arg, %arg {no_signed_wrap, no_unsigned_wrap} : i32
@@ -94,7 +99,7 @@ spirv.func @iadd_decorations(%arg: i32) -> i32 "None" {
9499

95100
// -----
96101

97-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Kernel], []> {
102+
spirv.module Logical OpenCL requires #spirv.vce<v1.0, [Kernel, Linkage], []> {
98103
spirv.func @fadd_decorations(%arg: f32) -> f32 "None" {
99104
// CHECK: spirv.FAdd %{{.*}}, %{{.*}} {fp_fast_math_mode = #spirv.fastmath_mode<NotNaN|NotInf|NSZ>}
100105
%0 = spirv.FAdd %arg, %arg {fp_fast_math_mode = #spirv.fastmath_mode<NotNaN|NotInf|NSZ>} : f32
@@ -104,7 +109,7 @@ spirv.func @fadd_decorations(%arg: f32) -> f32 "None" {
104109

105110
// -----
106111

107-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Kernel], []> {
112+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], []> {
108113
spirv.func @fmul_decorations(%arg: f32) -> f32 "None" {
109114
// CHECK: spirv.FMul %{{.*}}, %{{.*}} {no_contraction}
110115
%0 = spirv.FMul %arg, %arg {no_contraction} : f32
@@ -114,7 +119,7 @@ spirv.func @fmul_decorations(%arg: f32) -> f32 "None" {
114119

115120
// -----
116121

117-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Kernel, Float16], []> {
122+
spirv.module Logical OpenCL requires #spirv.vce<v1.0, [Kernel, Linkage, Float16], []> {
118123
spirv.func @fp_rounding_mode(%arg: f32) -> f16 "None" {
119124
// CHECK: spirv.FConvert %arg0 {fp_rounding_mode = #spirv.fp_rounding_mode<RTN>} : f32 to f16
120125
%0 = spirv.FConvert %arg {fp_rounding_mode = #spirv.fp_rounding_mode<RTN>} : f32 to f16
@@ -124,51 +129,7 @@ spirv.func @fp_rounding_mode(%arg: f32) -> f16 "None" {
124129

125130
// -----
126131

127-
// CHECK-LABEL: spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
128-
129-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
130-
spirv.func @cache_controls() "None" {
131-
// CHECK: spirv.Variable {cache_control_load_intel = [#spirv.cache_control_load_intel<cache_level = 0, load_cache_control = Uncached>, #spirv.cache_control_load_intel<cache_level = 1, load_cache_control = Cached>, #spirv.cache_control_load_intel<cache_level = 2, load_cache_control = InvalidateAfterR>]} : !spirv.ptr<f32, Function>
132-
%0 = spirv.Variable {cache_control_load_intel = [#spirv.cache_control_load_intel<cache_level = 0, load_cache_control = Uncached>, #spirv.cache_control_load_intel<cache_level = 1, load_cache_control = Cached>, #spirv.cache_control_load_intel<cache_level = 2, load_cache_control = InvalidateAfterR>]} : !spirv.ptr<f32, Function>
133-
// CHECK: spirv.Variable {cache_control_store_intel = [#spirv.cache_control_store_intel<cache_level = 0, store_cache_control = Uncached>, #spirv.cache_control_store_intel<cache_level = 1, store_cache_control = WriteThrough>, #spirv.cache_control_store_intel<cache_level = 2, store_cache_control = WriteBack>]} : !spirv.ptr<f32, Function>
134-
%1 = spirv.Variable {cache_control_store_intel = [#spirv.cache_control_store_intel<cache_level = 0, store_cache_control = Uncached>, #spirv.cache_control_store_intel<cache_level = 1, store_cache_control = WriteThrough>, #spirv.cache_control_store_intel<cache_level = 2, store_cache_control = WriteBack>]} : !spirv.ptr<f32, Function>
135-
spirv.Return
136-
}
137-
}
138-
139-
// -----
140-
141-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
142-
spirv.func @cache_controls_invalid_type() "None" {
143-
// expected-error@below {{expecting array attribute of CacheControlLoadINTEL for CacheControlLoadINTEL}}
144-
%0 = spirv.Variable {cache_control_load_intel = #spirv.cache_control_load_intel<cache_level = 0, load_cache_control = Uncached>} : !spirv.ptr<f32, Function>
145-
spirv.Return
146-
}
147-
}
148-
149-
// -----
150-
151-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
152-
spirv.func @cache_controls_invalid_type() "None" {
153-
// expected-error@below {{expecting array attribute of CacheControlStoreINTEL for CacheControlStoreINTEL}}
154-
%0 = spirv.Variable {cache_control_store_intel = [#spirv.cache_control_store_intel<cache_level = 0, store_cache_control = Uncached>, 0 : i32]} : !spirv.ptr<f32, Function>
155-
spirv.Return
156-
}
157-
}
158-
159-
// -----
160-
161-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> {
162-
spirv.func @cache_controls_invalid_type() "None" {
163-
// expected-error@below {{expecting non-empty array attribute of CacheControlStoreINTEL for CacheControlStoreINTEL}}
164-
%0 = spirv.Variable {cache_control_store_intel = []} : !spirv.ptr<f32, Function>
165-
spirv.Return
166-
}
167-
}
168-
169-
// -----
170-
171-
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
132+
spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader, Linkage], []> {
172133
// CHECK: spirv.func @relaxed_precision_arg({{%.*}}: !spirv.ptr<f32, Function> {spirv.decoration = #spirv.decoration<RelaxedPrecision>}) "None" attributes {relaxed_precision} {
173134
spirv.func @relaxed_precision_arg(%arg0: !spirv.ptr<f32, Function> {spirv.decoration = #spirv.decoration<RelaxedPrecision>}) -> () "None" attributes {relaxed_precision} {
174135
spirv.Return

0 commit comments

Comments
 (0)