Addressing review feedback

Author: parsifal-47

llvm/lib/CodeGen/MachineVerifier.cpp

@@ -1276,18 +1276,8 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
           report("load memory size cannot exceed result size", MI);
 
         if (MMO.getRanges()) {
-          auto operandBits = [](const MDOperand &o) -> unsigned {
-            ConstantInt *i = mdconst::extract<ConstantInt>(o);
-            if (!i->isNegative())
-              return i->getValue().getActiveBits();
-            APInt reversed(i->getValue());
-            reversed.negate();
-            return reversed.getActiveBits() + 1; // one more bit for the sign
-          };
-          unsigned bitsUsed =
-              std::max(operandBits(MMO.getRanges()->getOperand(0)),
-                       operandBits(MMO.getRanges()->getOperand(1)));
-          if (bitsUsed != ValTy.getScalarType().getSizeInBits()) {
+          ConstantInt *i = mdconst::extract<ConstantInt>(MMO.getRanges()->getOperand(0));
+          if (i->getIntegerType()->getBitWidth() != ValTy.getScalarType().getSizeInBits()) {
             report("range is incompatible with the value it gets assigned to",
                    MI);
           }

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir

@@ -30,6 +30,7 @@
   !0 = !{i24 0, i24 1048575}
   !1 = !{!"omnipotent char", !2}
   !2 = !{!"Simple C/C++ TBAA"}
+  !3 = !{i32 0, i32 1048575}
 ...
 
 # Make sure range metadata is not preserved when widening loads, but
@@ -67,7 +68,7 @@ body: |
     ; SI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load (s32), !tbaa !1, addrspace 1)
     ; SI-NEXT: $vgpr0 = COPY [[LOAD]](s32)
     %0:_(p1) = COPY $vgpr0_vgpr1
-    %1:_(s32) = G_LOAD %0 :: (load (s24), align 4, addrspace 1, !range !0, !tbaa !1)
+    %1:_(s32) = G_LOAD %0 :: (load (s24), align 4, addrspace 1, !range !3, !tbaa !1)
     $vgpr0 = COPY %1
 
 ...

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir

@@ -17,6 +17,7 @@
   !0 = !{i96 0, i96 9223372036854775808}
   !1 = !{!"omnipotent char", !2}
   !2 = !{!"Simple C/C++ TBAA"}
+  !3 = !{i32 0, i32 4294967295}
 ...
 
 # Make sure range metadata is not preserved when widening loads, but
@@ -44,10 +45,10 @@ body: |
     ; GFX12: liveins: $sgpr0_sgpr1
     ; GFX12-NEXT: {{  $}}
     ; GFX12-NEXT: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
-    ; GFX12-NEXT: [[LOAD:%[0-9]+]]:sgpr(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load (<3 x s32>), align 8, !range !0, addrspace 4)
+    ; GFX12-NEXT: [[LOAD:%[0-9]+]]:sgpr(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load (<3 x s32>), align 8
     ; GFX12-NEXT: $sgpr0_sgpr1_sgpr2 = COPY [[LOAD]](<3 x s32>)
     %0:_(p4) = COPY $sgpr0_sgpr1
-    %1:_(<3 x s32>) = G_LOAD %0 :: (load (<3 x s32>), align 8, addrspace 4, !range !0)
+    %1:_(<3 x s32>) = G_LOAD %0 :: (load (<3 x s32>), align 8, addrspace 4, !range !3)
     $sgpr0_sgpr1_sgpr2 = COPY %1
 
 ...

llvm/test/MachineVerifier/test_g_incompatible_range.mir

@@ -0,0 +1,34 @@
+# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=none %s -filetype=null 2>&1 | FileCheck %s
+--- |
+  define void @range_metadata_sext_i33_signed_range_i64_load_as_v2i32() {
+    ret void
+  }
+
+  !0 = !{i64 -4294967295, i64 4294967296}
+  !1 = !{i64 -8589934591, i64 8589934592}
+
+...
+---
+name:            range_metadata_sext_i33_signed_range_i64_load_as_v2i32
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0, $vgpr1
+
+    %1:_(s32) = COPY $vgpr0
+    %2:_(s32) = COPY $vgpr1
+    %0:_(p1) = G_MERGE_VALUES %1(s32), %2(s32)
+
+    ; CHECK: Bad machine code: range is incompatible with the value it gets assigned to
+    %3:_(<2 x s32>) = G_LOAD %0(p1) :: (volatile load (s64), align 4, !range !1, addrspace 1)
+
+    ; CHECK: Bad machine code: range is incompatible with the value it gets assigned to
+    %4:_(<2 x s32>) = G_LOAD %0(p1) :: (volatile load (s64), align 4, !range !0, addrspace 1)
+
+    ; CHECK: Bad machine code: range is incompatible with the value it gets assigned to
+    %5:_(<2 x s32>) = G_LOAD %0(p1) :: (volatile load (s64), align 4, !range !0, addrspace 1)
+
+    $vgpr0_vgpr1 = COPY %3
+    SI_RETURN implicit $vgpr0_vgpr1
+
+...