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Author: dcaballe

mlir/include/mlir/Dialect/Vector/IR/VectorOps.td

@@ -2475,7 +2475,9 @@ def Vector_MaskOp : Vector_Op<"mask", [
     should not. The `vector.mask` operation returns the value produced by the
     masked execution of the nested operation, if any. The masked-off lanes in
     the result vector are taken from the corresponding lanes of the pass-thru
-    argument, if provided, or left unmodified, otherwise.
+    argument, if provided, or left unmodified, otherwise. At this point, 0-D
+    vectors are not supported by `vector.mask`. They may be supported in the
+    future.
 
     The `vector.mask` operation does not prescribe how a maskable operation
     should be masked or how a masked operation should be lowered. Masking

mlir/lib/Dialect/Vector/IR/VectorOps.cpp

@@ -4122,7 +4122,8 @@ VectorType mlir::vector::inferTransferOpMaskType(VectorType vecType,
   assert(invPermMap && "Inversed permutation map couldn't be computed");
   SmallVector<int64_t, 8> maskShape = invPermMap.compose(vecType.getShape());
 
-  // Turn a 0-D mask into a single-element 1-D mask.
+  // The MaskOp specification doesn't support 0-D vectors at the moment. Turn a
+  // 0-D mask into a single-element 1-D mask.
   if (maskShape.empty())
     maskShape.push_back(1);
 

mlir/test/Dialect/Vector/invalid.mlir

@@ -1752,7 +1752,6 @@ func.func @vector_mask_non_maskable_op(%a : vector<3x4xf32>) -> vector<3x4xf32>
 
 // -----
 
-// We can support 0-D masks if eventually needed.
 func.func @vector_mask_0d_mask(%arg0: tensor<2x4xi32>,
                                %idx0: index, %idx1: index,
                                %m0: vector<i1>) -> vector<1x1x4xi32> {