Run clang format

Author: arjunUpatel

llvm/include/llvm/MC/MCInstrAnalysis.h

@@ -186,7 +186,8 @@ class LLVM_ABI MCInstrAnalysis {
   /// Given an instruction that accesses a memory address, try to compute
   /// the target address. Return true on success, and the address in \p Target.
   virtual bool evaluateInstruction(const MCInst &Inst, uint64_t Addr,
-                                   uint64_t Size, uint64_t &Target, const MCSubtargetInfo &STI) const;
+                                   uint64_t Size, uint64_t &Target,
+                                   const MCSubtargetInfo &STI) const;
 
   /// Given an instruction tries to get the address of a memory operand. Returns
   /// the address on success.

llvm/lib/MC/MCInstrAnalysis.cpp

@@ -31,8 +31,7 @@ bool MCInstrAnalysis::evaluateBranch(const MCInst & /*Inst*/, uint64_t /*Addr*/,
 }
 
 bool MCInstrAnalysis::evaluateInstruction(const MCInst &Inst, uint64_t Addr,
-                                          uint64_t Size,
-                                          uint64_t &Target,
+                                          uint64_t Size, uint64_t &Target,
                                           const MCSubtargetInfo &STI) const {
   return false;
 }

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp

@@ -244,7 +244,8 @@ class RISCVMCInstrAnalysis : public MCInstrAnalysis {
   }
 
   bool evaluateInstruction(const MCInst &Inst, uint64_t Addr, uint64_t Size,
-                           uint64_t &Target, const MCSubtargetInfo &STI) const override {
+                           uint64_t &Target,
+                           const MCSubtargetInfo &STI) const override {
     unsigned int ArchRegWidth = STI.getTargetTriple().getArchPointerBitWidth();
     switch(Inst.getOpcode()) {
     default:
@@ -442,7 +443,6 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTargetMC() {
     // Register the null target streamer.
     TargetRegistry::RegisterNullTargetStreamer(*T,
                                                createRISCVNullTargetStreamer);
-    TargetRegistry::RegisterMCInstrAnalysis(*T,
-                                            createRISCVInstrAnalysis);
+    TargetRegistry::RegisterMCInstrAnalysis(*T, createRISCVInstrAnalysis);
   }
 }

llvm/tools/llvm-objdump/llvm-objdump.cpp

@@ -2358,7 +2358,8 @@ disassembleObject(ObjectFile &Obj, const ObjectFile &DbgObj,
             bool PrintTarget = DT->InstrAnalysis->evaluateBranch(
                                    Inst, SectionAddr + Index, Size, Target) ||
                                DT->InstrAnalysis->evaluateInstruction(
-                                   Inst, SectionAddr + Index, Size, Target, *DT->SubtargetInfo);
+                                   Inst, SectionAddr + Index, Size, Target,
+                                   *DT->SubtargetInfo);
             if (!PrintTarget) {
               if (std::optional<uint64_t> MaybeTarget =
                       DT->InstrAnalysis->evaluateMemoryOperandAddress(