@@ -9559,18 +9559,18 @@ SDValue RISCVTargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const {
95599559 // floating value when CondV is int type
95609560 bool FPinGPR = Subtarget.hasStdExtZfinx();
95619561 bool UseZicondForFPSel = Subtarget.hasStdExtZicond() && FPinGPR &&
9562- VT.isFloatingPoint() &&
9563- CondV.getValueType().isInteger();
9562+ VT.isFloatingPoint();
9563+
95649564 if (UseZicondForFPSel) {
95659565 MVT XLenIntVT = Subtarget.getXLenVT();
95669566
95679567 auto CastToInt = [&](SDValue V) -> SDValue {
9568- if (VT == MVT::f16) {
9568+ if (VT == MVT::f16)
95699569 return DAG.getNode(RISCVISD::FMV_X_ANYEXTH, DL, XLenIntVT, V);
9570- }
9571- if (VT == MVT::f32 && Subtarget.is64Bit()) {
9570+
9571+ if (VT == MVT::f32 && Subtarget.is64Bit())
95729572 return DAG.getNode(RISCVISD::FMV_X_ANYEXTW_RV64, DL, XLenIntVT, V);
9573- }
9573+
95749574 return DAG.getBitcast(XLenIntVT, V);
95759575 };
95769576
@@ -9582,12 +9582,12 @@ SDValue RISCVTargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const {
95829582 DAG.getNode(ISD::SELECT, DL, XLenIntVT, CondV, TrueVInt, FalseVInt);
95839583
95849584 // Convert back to floating VT
9585- if (VT == MVT::f32 && Subtarget.is64Bit()) {
9585+ if (VT == MVT::f32 && Subtarget.is64Bit())
95869586 return DAG.getNode(RISCVISD::FMV_W_X_RV64, DL, VT, ResultInt);
9587- }
9588- if (VT == MVT::f16) {
9587+
9588+ if (VT == MVT::f16)
95899589 return DAG.getNode(RISCVISD::FMV_H_X, DL, VT, ResultInt);
9590- }
9590+
95919591 return DAG.getBitcast(VT, ResultInt);
95929592 }
95939593
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