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[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64
According to llvm/docs/InstrRefDebugInfo.md, to support proper instruction referecing on any platform, the target specific `TargetInstrInfo::isLoadFromStackSlotPostFE` and `TargetInstrInfo::isStoreToStackSlotPostFE` functions are needed to be implemented for the Instruction Reference-based LiveDebugValues pass to identify spill and restore instructions. This patch is attempting to reland #162327
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4 files changed

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-11
lines changed

4 files changed

+369
-11
lines changed

‎llvm/lib/Target/AArch64/AArch64InstrInfo.cpp‎

Lines changed: 53 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2392,11 +2392,10 @@ bool AArch64InstrInfo::isFPRCopy(const MachineInstr &MI) {
23922392
return false;
23932393
}
23942394

2395-
Register AArch64InstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
2396-
int &FrameIndex) const {
2397-
switch (MI.getOpcode()) {
2395+
static bool isFrameLoadOpcode(int Opcode) {
2396+
switch (Opcode) {
23982397
default:
2399-
break;
2398+
return false;
24002399
case AArch64::LDRWui:
24012400
case AArch64::LDRXui:
24022401
case AArch64::LDRBui:
@@ -2405,22 +2404,26 @@ Register AArch64InstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
24052404
case AArch64::LDRDui:
24062405
case AArch64::LDRQui:
24072406
case AArch64::LDR_PXI:
2407+
return true;
2408+
}
2409+
}
2410+
2411+
Register AArch64InstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
2412+
int &FrameIndex) const {
2413+
if (isFrameLoadOpcode(MI.getOpcode())) {
24082414
if (MI.getOperand(0).getSubReg() == 0 && MI.getOperand(1).isFI() &&
24092415
MI.getOperand(2).isImm() && MI.getOperand(2).getImm() == 0) {
24102416
FrameIndex = MI.getOperand(1).getIndex();
24112417
return MI.getOperand(0).getReg();
24122418
}
2413-
break;
24142419
}
2415-
24162420
return 0;
24172421
}
24182422

2419-
Register AArch64InstrInfo::isStoreToStackSlot(const MachineInstr &MI,
2420-
int &FrameIndex) const {
2421-
switch (MI.getOpcode()) {
2423+
static bool isFrameStoreOpcode(int Opcode) {
2424+
switch (Opcode) {
24222425
default:
2423-
break;
2426+
return false;
24242427
case AArch64::STRWui:
24252428
case AArch64::STRXui:
24262429
case AArch64::STRBui:
@@ -2429,16 +2432,55 @@ Register AArch64InstrInfo::isStoreToStackSlot(const MachineInstr &MI,
24292432
case AArch64::STRDui:
24302433
case AArch64::STRQui:
24312434
case AArch64::STR_PXI:
2435+
return true;
2436+
}
2437+
}
2438+
2439+
Register AArch64InstrInfo::isStoreToStackSlot(const MachineInstr &MI,
2440+
int &FrameIndex) const {
2441+
if (isFrameStoreOpcode(MI.getOpcode())) {
24322442
if (MI.getOperand(0).getSubReg() == 0 && MI.getOperand(1).isFI() &&
24332443
MI.getOperand(2).isImm() && MI.getOperand(2).getImm() == 0) {
24342444
FrameIndex = MI.getOperand(1).getIndex();
24352445
return MI.getOperand(0).getReg();
24362446
}
2437-
break;
24382447
}
24392448
return 0;
24402449
}
24412450

2451+
Register AArch64InstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI,
2452+
int &FrameIndex) const {
2453+
if (isFrameStoreOpcode(MI.getOpcode())) {
2454+
SmallVector<const MachineMemOperand *, 1> Accesses;
2455+
if (Register Reg = isStoreToStackSlot(MI, FrameIndex))
2456+
return Reg;
2457+
2458+
if (hasStoreToStackSlot(MI, Accesses)) {
2459+
FrameIndex =
2460+
cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
2461+
->getFrameIndex();
2462+
return MI.getOperand(0).getReg();
2463+
}
2464+
}
2465+
return Register();
2466+
}
2467+
2468+
Register AArch64InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI,
2469+
int &FrameIndex) const {
2470+
if (isFrameLoadOpcode(MI.getOpcode())) {
2471+
if (Register Reg = isLoadFromStackSlot(MI, FrameIndex))
2472+
return Reg;
2473+
SmallVector<const MachineMemOperand *, 1> Accesses;
2474+
if (hasLoadFromStackSlot(MI, Accesses)) {
2475+
FrameIndex =
2476+
cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
2477+
->getFrameIndex();
2478+
return MI.getOperand(0).getReg();
2479+
}
2480+
}
2481+
return Register();
2482+
}
2483+
24422484
/// Check all MachineMemOperands for a hint to suppress pairing.
24432485
bool AArch64InstrInfo::isLdStPairSuppressed(const MachineInstr &MI) {
24442486
return llvm::any_of(MI.memoperands(), [](MachineMemOperand *MMO) {

‎llvm/lib/Target/AArch64/AArch64InstrInfo.h‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -205,6 +205,15 @@ class AArch64InstrInfo final : public AArch64GenInstrInfo {
205205
Register isStoreToStackSlot(const MachineInstr &MI,
206206
int &FrameIndex) const override;
207207

208+
/// isStoreToStackSlotPostFE - Check for post-frame ptr elimination
209+
/// stack locations as well. This uses a heuristic so it isn't
210+
/// reliable for correctness.
211+
Register isStoreToStackSlotPostFE(const MachineInstr &MI,
212+
int &FrameIndex) const override;
213+
214+
Register isLoadFromStackSlotPostFE(const MachineInstr &MI,
215+
int &FrameIndex) const override;
216+
208217
/// Does this instruction set its full destination register to zero?
209218
static bool isGPRZero(const MachineInstr &MI);
210219

‎llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir‎

Lines changed: 246 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,246 @@
1+
# Test to ensure that variable "__last" is properly recovered at the end of the livedebugvalues pass when Instruction Referencing-based LiveDebugValues is used.
2+
# This testcase was obtained by looking at FileCheck.cpp and reducing it down via llvm-reduce.
3+
4+
# RUN: llc -o - %s -run-pass=livedebugvalues | FileCheck %s
5+
6+
# CHECK: ![[LOC:[0-9]+]] = !DILocalVariable(name: "__last",
7+
# CHECK: DBG_VALUE_LIST ![[LOC]], !DIExpression(DW_OP_LLVM_arg, 0), $x8
8+
9+
10+
--- |
11+
; ModuleID = '/Users/srastogi/Development/llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks.ll'
12+
source_filename = "/Users/srastogi/Development/llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks.ll"
13+
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
14+
target triple = "aarch64-apple-darwin"
15+
16+
declare void @_ZdlPvm()
17+
18+
define fastcc void @"_ZNSt3__111__introsortINS_17_ClassicAlgPolicyERZL18DumpAnnotatedInputRN4llvm11raw_ostreamERKNS2_16FileCheckRequestE20DumpInputFilterValuejNS2_9StringRefERNS_6vectorI15InputAnnotationNS_9allocatorISB_EEEEjE3$_0PSB_Lb0EEEvT1_SJ_T0_NS_15iterator_traitsISJ_E15difference_typeEb"(ptr %__first, ptr %__last, i1 %cmp, ptr %__first.addr.0, ptr %Label3.i.i.i241, ptr %__pivot.sroa.9113.8.copyload.i, ptr %0, ptr %1) !dbg !4 {
19+
br label %while.cond
20+
21+
while.cond: ; preds = %if.end16, %2
22+
br i1 %cmp, label %if.then13, label %if.end16
23+
24+
if.then13: ; preds = %while.cond
25+
%cmp.i = icmp eq ptr %__first, %__last
26+
%or.cond.i = select i1 %cmp.i, i1 false, i1 false
27+
#dbg_value(ptr %__last, !10, !DIExpression(), !16)
28+
br i1 %or.cond.i, label %common.ret, label %for.body.i, !dbg !23
29+
30+
common.ret: ; preds = %for.body.i, %if.then13
31+
ret void
32+
33+
for.body.i: ; preds = %if.then13
34+
%InputLine.i.i = getelementptr i8, ptr %__first.addr.0, i64 132
35+
br label %common.ret
36+
37+
if.end16: ; preds = %while.cond
38+
%__pivot.sroa.13.8.copyload.i = load i64, ptr null, align 8
39+
call void @_ZdlPvm()
40+
store ptr %__pivot.sroa.9113.8.copyload.i, ptr %0, align 8
41+
store i64 %__pivot.sroa.13.8.copyload.i, ptr %1, align 8
42+
store i64 0, ptr %__first, align 8
43+
store i32 0, ptr %__first.addr.0, align 8
44+
store i32 1, ptr %Label3.i.i.i241, align 4
45+
br label %while.cond
46+
}
47+
48+
!llvm.module.flags = !{!0}
49+
!llvm.dbg.cu = !{!1}
50+
51+
!0 = !{i32 2, !"Debug Info Version", i32 3}
52+
!1 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !2, producer: "clang version 22.0.0git ([email protected]:llvm/llvm-project.git 46a3b4d5dc6dd9449ec7c0c9065552368cdf41d6)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !3, retainedTypes: !3, globals: !3, imports: !3, splitDebugInlining: false, nameTableKind: Apple, sysroot: "/Library/Developer/CommandLineTools/SDKs/MacOSX15.3.sdk", sdk: "MacOSX15.3.sdk")
53+
!2 = !DIFile(filename: "/Users/shubhamrastogi/Development/llvm-project-instr-ref/llvm-project/llvm/utils/FileCheck/FileCheck.cpp", directory: "/Users/shubhamrastogi/Development/llvm-project-instr-ref/llvm-project/build-instr-ref-stage2", checksumkind: CSK_MD5, checksum: "fa5f53f1b5782eb8b92fadec416b8941")
54+
!3 = !{}
55+
!4 = distinct !DISubprogram(name: "__introsort<std::__1::_ClassicAlgPolicy, (lambda at /Users/shubhamrastogi/Development/llvm-project-instr-ref/llvm-project/llvm/utils/FileCheck/FileCheck.cpp:544:14) &, InputAnnotation *, false>", linkageName: "_ZNSt3__111__introsortINS_17_ClassicAlgPolicyERZL18DumpAnnotatedInputRN4llvm11raw_ostreamERKNS2_16FileCheckRequestE20DumpInputFilterValuejNS2_9StringRefERNS_6vectorI15InputAnnotationNS_9allocatorISB_EEEEjE3$_0PSB_Lb0EEEvT1_SJ_T0_NS_15iterator_traitsISJ_E15difference_typeEb", scope: !6, file: !5, line: 758, type: !8, scopeLine: 762, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition | DISPFlagOptimized, unit: !1, templateParams: !3, retainedNodes: !3, keyInstructions: true)
56+
!5 = !DIFile(filename: "/Library/Developer/CommandLineTools/SDKs/MacOSX15.3.sdk/usr/include/c++/v1/__algorithm/sort.h", directory: "")
57+
!6 = !DINamespace(name: "__1", scope: !7, exportSymbols: true)
58+
!7 = !DINamespace(name: "std", scope: null)
59+
!8 = !DISubroutineType(cc: DW_CC_nocall, types: !9)
60+
!9 = !{null}
61+
!10 = !DILocalVariable(name: "__last", arg: 2, scope: !11, file: !5, line: 284, type: !13)
62+
!11 = distinct !DISubprogram(name: "__insertion_sort<std::__1::_ClassicAlgPolicy, (lambda at /Users/shubhamrastogi/Development/llvm-project-instr-ref/llvm-project/llvm/utils/FileCheck/FileCheck.cpp:544:14) &, InputAnnotation *>", linkageName: "_ZNSt3__116__insertion_sortB8nn180100INS_17_ClassicAlgPolicyERZL18DumpAnnotatedInputRN4llvm11raw_ostreamERKNS2_16FileCheckRequestE20DumpInputFilterValuejNS2_9StringRefERNS_6vectorI15InputAnnotationNS_9allocatorISB_EEEEjE3$_0PSB_EEvT1_SJ_T0_", scope: !6, file: !5, line: 284, type: !12, scopeLine: 284, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition | DISPFlagOptimized, unit: !1, templateParams: !3, retainedNodes: !3, keyInstructions: true)
63+
!12 = distinct !DISubroutineType(types: !9)
64+
!13 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !14, size: 64)
65+
!14 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "InputAnnotation", file: !15, line: 323, size: 768, flags: DIFlagTypePassByReference | DIFlagNonTrivial, elements: !3, identifier: "_ZTS15InputAnnotation")
66+
!15 = !DIFile(filename: "llvm/utils/FileCheck/FileCheck.cpp", directory: "/Users/shubhamrastogi/Development/llvm-project-instr-ref/llvm-project", checksumkind: CSK_MD5, checksum: "fa5f53f1b5782eb8b92fadec416b8941")
67+
!16 = !DILocation(line: 0, scope: !11, inlinedAt: !17)
68+
!17 = distinct !DILocation(line: 800, column: 9, scope: !18)
69+
!18 = distinct !DILexicalBlock(scope: !19, file: !5, line: 799, column: 23)
70+
!19 = distinct !DILexicalBlock(scope: !20, file: !5, line: 799, column: 11)
71+
!20 = distinct !DILexicalBlock(scope: !21, file: !5, line: 798, column: 26)
72+
!21 = distinct !DILexicalBlock(scope: !22, file: !5, line: 798, column: 9)
73+
!22 = distinct !DILexicalBlock(scope: !4, file: !5, line: 770, column: 16)
74+
!23 = !DILocation(line: 288, column: 15, scope: !24, inlinedAt: !17, atomGroup: 1, atomRank: 1)
75+
!24 = distinct !DILexicalBlock(scope: !11, file: !5, line: 288, column: 7)
76+
...
77+
---
78+
name: '_ZNSt3__111__introsortINS_17_ClassicAlgPolicyERZL18DumpAnnotatedInputRN4llvm11raw_ostreamERKNS2_16FileCheckRequestE20DumpInputFilterValuejNS2_9StringRefERNS_6vectorI15InputAnnotationNS_9allocatorISB_EEEEjE3$_0PSB_Lb0EEEvT1_SJ_T0_NS_15iterator_traitsISJ_E15difference_typeEb'
79+
alignment: 4
80+
exposesReturnsTwice: false
81+
legalized: false
82+
regBankSelected: false
83+
selected: false
84+
failedISel: false
85+
tracksRegLiveness: true
86+
hasWinCFI: false
87+
noPhis: true
88+
isSSA: false
89+
noVRegs: true
90+
hasFakeUses: false
91+
callsEHReturn: false
92+
callsUnwindInit: false
93+
hasEHContTarget: false
94+
hasEHScopes: false
95+
hasEHFunclets: false
96+
isOutlined: false
97+
debugInstrRef: true
98+
failsVerification: false
99+
tracksDebugUserValues: true
100+
registers: []
101+
liveins:
102+
- { reg: '$x0', virtual-reg: '' }
103+
- { reg: '$x1', virtual-reg: '' }
104+
- { reg: '$w2', virtual-reg: '' }
105+
- { reg: '$x3', virtual-reg: '' }
106+
- { reg: '$x4', virtual-reg: '' }
107+
- { reg: '$x5', virtual-reg: '' }
108+
- { reg: '$x6', virtual-reg: '' }
109+
- { reg: '$x7', virtual-reg: '' }
110+
frameInfo:
111+
isFrameAddressTaken: false
112+
isReturnAddressTaken: false
113+
hasStackMap: false
114+
hasPatchPoint: false
115+
stackSize: 112
116+
offsetAdjustment: 0
117+
maxAlignment: 8
118+
adjustsStack: true
119+
hasCalls: true
120+
stackProtector: ''
121+
functionContext: ''
122+
maxCallFrameSize: 0
123+
cvBytesOfCalleeSavedRegisters: 0
124+
hasOpaqueSPAdjustment: false
125+
hasVAStart: false
126+
hasMustTailInVarArgFunc: false
127+
hasTailCall: false
128+
isCalleeSavedInfoValid: true
129+
localFrameSize: 0
130+
fixedStack: []
131+
stack:
132+
- { id: 0, name: '', type: spill-slot, offset: -104, size: 8, alignment: 8,
133+
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
134+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
135+
- { id: 1, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
136+
stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
137+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
138+
- { id: 2, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
139+
stack-id: default, callee-saved-register: '$fp', callee-saved-restored: true,
140+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
141+
- { id: 3, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
142+
stack-id: default, callee-saved-register: '$x19', callee-saved-restored: true,
143+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
144+
- { id: 4, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
145+
stack-id: default, callee-saved-register: '$x20', callee-saved-restored: true,
146+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
147+
- { id: 5, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
148+
stack-id: default, callee-saved-register: '$x21', callee-saved-restored: true,
149+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
150+
- { id: 6, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
151+
stack-id: default, callee-saved-register: '$x22', callee-saved-restored: true,
152+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
153+
- { id: 7, name: '', type: spill-slot, offset: -56, size: 8, alignment: 8,
154+
stack-id: default, callee-saved-register: '$x23', callee-saved-restored: true,
155+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
156+
- { id: 8, name: '', type: spill-slot, offset: -64, size: 8, alignment: 8,
157+
stack-id: default, callee-saved-register: '$x24', callee-saved-restored: true,
158+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
159+
- { id: 9, name: '', type: spill-slot, offset: -72, size: 8, alignment: 8,
160+
stack-id: default, callee-saved-register: '$x25', callee-saved-restored: true,
161+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
162+
- { id: 10, name: '', type: spill-slot, offset: -80, size: 8, alignment: 8,
163+
stack-id: default, callee-saved-register: '$x26', callee-saved-restored: true,
164+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
165+
- { id: 11, name: '', type: spill-slot, offset: -88, size: 8, alignment: 8,
166+
stack-id: default, callee-saved-register: '$x27', callee-saved-restored: true,
167+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
168+
- { id: 12, name: '', type: spill-slot, offset: -96, size: 8, alignment: 8,
169+
stack-id: default, callee-saved-register: '$x28', callee-saved-restored: true,
170+
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
171+
entry_values: []
172+
callSites: []
173+
debugValueSubstitutions: []
174+
constants: []
175+
machineFunctionInfo:
176+
hasRedZone: false
177+
stackSizeZPR: 0
178+
stackSizePPR: 0
179+
hasStackFrame: true
180+
body: |
181+
bb.0 (%ir-block.2):
182+
successors: %bb.2(0x04000000), %bb.3(0x7c000000)
183+
liveins: $w2, $x0, $x1, $x3, $x4, $x5, $x6, $x7, $x27, $x28, $x25, $x26, $x23, $x24, $x21, $x22, $x19, $x20, $lr
184+
185+
$sp = frame-setup SUBXri $sp, 112, 0
186+
frame-setup STPXi killed $x28, killed $x27, $sp, 2 :: (store (s64) into %stack.12), (store (s64) into %stack.11)
187+
frame-setup STPXi killed $x26, killed $x25, $sp, 4 :: (store (s64) into %stack.10), (store (s64) into %stack.9)
188+
frame-setup STPXi killed $x24, killed $x23, $sp, 6 :: (store (s64) into %stack.8), (store (s64) into %stack.7)
189+
frame-setup STPXi killed $x22, killed $x21, $sp, 8 :: (store (s64) into %stack.6), (store (s64) into %stack.5)
190+
frame-setup STPXi killed $x20, killed $x19, $sp, 10 :: (store (s64) into %stack.4), (store (s64) into %stack.3)
191+
frame-setup STPXi $fp, killed $lr, $sp, 12 :: (store (s64) into %stack.2), (store (s64) into %stack.1)
192+
frame-setup CFI_INSTRUCTION def_cfa_offset 112
193+
frame-setup CFI_INSTRUCTION offset $w30, -8
194+
frame-setup CFI_INSTRUCTION offset $w29, -16
195+
frame-setup CFI_INSTRUCTION offset $w19, -24
196+
frame-setup CFI_INSTRUCTION offset $w20, -32
197+
frame-setup CFI_INSTRUCTION offset $w21, -40
198+
frame-setup CFI_INSTRUCTION offset $w22, -48
199+
frame-setup CFI_INSTRUCTION offset $w23, -56
200+
frame-setup CFI_INSTRUCTION offset $w24, -64
201+
frame-setup CFI_INSTRUCTION offset $w25, -72
202+
frame-setup CFI_INSTRUCTION offset $w26, -80
203+
frame-setup CFI_INSTRUCTION offset $w27, -88
204+
frame-setup CFI_INSTRUCTION offset $w28, -96
205+
DBG_PHI $x1, 1
206+
$x19 = ORRXrs $xzr, killed $x7, 0
207+
$x20 = ORRXrs $xzr, killed $x6, 0
208+
$x21 = ORRXrs $xzr, killed $x5, 0
209+
$x22 = ORRXrs $xzr, killed $x4, 0
210+
$x23 = ORRXrs $xzr, killed $x3, 0
211+
$w25 = ORRWrs $wzr, killed $w2, 0
212+
$x26 = ORRXrs $xzr, killed $x0, 0
213+
renamable $w27 = MOVZWi 1, 0
214+
STRXui killed $x1, $sp, 1 :: (store (s64) into %stack.0)
215+
TBNZW renamable $w25, 0, %bb.2
216+
217+
bb.3.if.end16:
218+
successors: %bb.2(0x04000000), %bb.3(0x7c000000)
219+
liveins: $w25, $w27, $x19, $x20, $x21, $x22, $x23, $x26
220+
221+
$x28 = ORRXrs $xzr, $xzr, 0
222+
renamable $x24 = LDRXui killed renamable $x28, 0 :: (load (s64) from `ptr null`)
223+
BL @_ZdlPvm, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
224+
STRXui renamable $x21, renamable $x20, 0 :: (store (s64) into %ir.0)
225+
STRXui killed renamable $x24, renamable $x19, 0 :: (store (s64) into %ir.1)
226+
STRXui $xzr, renamable $x26, 0 :: (store (s64) into %ir.__first)
227+
STRWui $wzr, renamable $x23, 0 :: (store (s32) into %ir.__first.addr.0, align 8)
228+
STRWui renamable $w27, renamable $x22, 0 :: (store (s32) into %ir.Label3.i.i.i241)
229+
TBZW renamable $w25, 0, %bb.3
230+
231+
bb.2.if.then13:
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liveins: $x26
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DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !16
235+
renamable $x8 = LDRXui $sp, 1 :: (load (s64) from %stack.0)
236+
STRXui $xzr, $sp, 1 :: (store (s64) into %stack.0)
237+
$fp, $lr = frame-destroy LDPXi $sp, 12 :: (load (s64) from %stack.2), (load (s64) from %stack.1)
238+
$x20, $x19 = frame-destroy LDPXi $sp, 10 :: (load (s64) from %stack.4), (load (s64) from %stack.3)
239+
$xzr = SUBSXrs killed renamable $x26, killed renamable $x8, 0, implicit-def $nzcv, debug-location !23
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$x22, $x21 = frame-destroy LDPXi $sp, 8 :: (load (s64) from %stack.6), (load (s64) from %stack.5)
241+
$x24, $x23 = frame-destroy LDPXi $sp, 6 :: (load (s64) from %stack.8), (load (s64) from %stack.7)
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$x26, $x25 = frame-destroy LDPXi $sp, 4 :: (load (s64) from %stack.10), (load (s64) from %stack.9)
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$x28, $x27 = frame-destroy LDPXi $sp, 2 :: (load (s64) from %stack.12), (load (s64) from %stack.11)
244+
$sp = frame-destroy ADDXri $sp, 112, 0
245+
RET undef $lr
246+
...

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