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lines changed Original file line number Diff line number Diff line change @@ -131,6 +131,32 @@ namespace LIBC_NAMESPACE_DECL {
131131 __arm_wsr (" CPSR_c" , 0x13 ); // SVC
132132#endif
133133
134+ #ifdef __ARM_FP
135+ // Enable FPU
136+ #if __ARM_ARCH_PROFILE == 'M'
137+ // Based on
138+ // https://developer.arm.com/documentation/dui0646/c/Cortex-M7-Peripherals/Floating-Point-Unit/Enabling-the-FPU
139+ // Set CPACR cp10 and cp11
140+ auto cpacr = (volatile uint32_t *const )0xE000ED88 ;
141+ *cpacr |= (0xF << 20 );
142+ __dsb (0xF );
143+ __isb (0xF );
144+ #elif __ARM_ARCH_PROFILE == 'A' || __ARM_ARCH_PROFILE == 'R'
145+ // Based on
146+ // https://developer.arm.com/documentation/dui0472/m/Compiler-Coding-Practices/Enabling-NEON-and-FPU-for-bare-metal
147+ // Set CPACR cp10 and cp11
148+ uint32_t cpacr = __arm_rsr (" p15:0:c1:c0:2" );
149+ cpacr |= (0xF << 20 );
150+ __arm_wsr (" p15:0:c1:c0:2" , cpacr);
151+ __isb (0xF );
152+ // Set FPEXC.EN
153+ uint32_t fpexc;
154+ __asm__ __volatile__ (" vmrs %0, FPEXC" : " =r" (fpexc) : :);
155+ fpexc |= (1 << 30 );
156+ __asm__ __volatile__ (" vmsr FPEXC, %0" : : " r" (fpexc) :);
157+ #endif
158+ #endif
159+
134160 // Perform the equivalent of scatterloading
135161 LIBC_NAMESPACE::memcpy (__data_start, __data_source,
136162 reinterpret_cast <uintptr_t >(__data_size));
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