adjust more tests

arichardson · arichardson · commit 243c8cfd8385 · 2025-04-29T22:01:44.000-07:00
Created using spr 1.3.6-beta.1
diff --git a/llvm/test/CodeGen/AMDGPU/addrspacecast-captured.ll b/llvm/test/CodeGen/AMDGPU/addrspacecast-captured.ll
@@ -1,8 +1,6 @@
 ; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -passes=amdgpu-promote-alloca < %s | FileCheck %s
 ; Nothing should be done if the addrspacecast is captured.
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare void @consume_ptr2int(i32) #0
 
 ; CHECK-LABEL: @addrspacecast_captured(
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4ceilf(float)
 declare <2 x float> @_Z4ceilDv2_f(<2 x float>)
 declare <3 x float> @_Z4ceilDv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-copysign.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-copysign.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z8copysignff(float, float)
 declare <2 x float> @_Z8copysignDv2_fS_(<2 x float>, <2 x float>)
 declare <3 x float> @_Z8copysignDv3_fS_(<3 x float>, <3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z3expf(float)
 declare <2 x float> @_Z3expDv2_f(<2 x float>)
 declare <3 x float> @_Z3expDv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp2.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp2.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4exp2f(float)
 declare <2 x float> @_Z4exp2Dv2_f(<2 x float>)
 declare <3 x float> @_Z4exp2Dv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fabs.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fabs.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4fabsf(float)
 declare <2 x float> @_Z4fabsDv2_f(<2 x float>)
 declare <3 x float> @_Z4fabsDv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-floor.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-floor.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z5floorf(float)
 declare <2 x float> @_Z5floorDv2_f(<2 x float>)
 declare <3 x float> @_Z5floorDv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fma.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fma.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z3fmafff(float, float, float)
 declare <2 x float> @_Z3fmaDv2_fS_S_(<2 x float>, <2 x float>, <2 x float>)
 declare <3 x float> @_Z3fmaDv3_fS_S_(<3 x float>, <3 x float>, <3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmax-splat.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmax-splat.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare <2 x float> @_Z4fmaxDv2_ff(<2 x float>, float)
 declare <2 x float> @_Z4fmaxDv2_fS_(<2 x float>, <2 x float>)
 declare <3 x float> @_Z4fmaxDv3_ff(<3 x float>, float)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmax.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmax.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4fmaxff(float, float)
 declare <2 x float> @_Z4fmaxDv2_fS_(<2 x float>, <2 x float>)
 declare <3 x float> @_Z4fmaxDv3_fS_(<3 x float>, <3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmin-splat.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmin-splat.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare <2 x float> @_Z4fminDv2_ff(<2 x float>, float)
 declare <2 x float> @_Z4fminDv2_fS_(<2 x float>, <2 x float>)
 declare <3 x float> @_Z4fminDv3_ff(<3 x float>, float)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmin.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmin.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4fminff(float, float)
 declare <2 x float> @_Z4fminDv2_fS_(<2 x float>, <2 x float>)
 declare <3 x float> @_Z4fminDv3_fS_(<3 x float>, <3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ldexp-splat.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ldexp-splat.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare <2 x float> @_Z5ldexpDv2_fi(<2 x float>, i32)
 declare <3 x float> @_Z5ldexpDv3_fi(<3 x float>, i32)
 declare <4 x float> @_Z5ldexpDv4_fi(<4 x float>, i32)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ldexp.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ldexp.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z5ldexpfi(float, i32)
 declare <2 x float> @_Z5ldexpDv2_fDv2_i(<2 x float>, <2 x i32>)
 declare <3 x float> @_Z5ldexpDv3_fDv3_i(<3 x float>, <3 x i32>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z3logf(float)
 declare <2 x float> @_Z3logDv2_f(<2 x float>)
 declare <3 x float> @_Z3logDv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log10.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log10.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z5log10f(float)
 declare <2 x float> @_Z5log10Dv2_f(<2 x float>)
 declare <3 x float> @_Z5log10Dv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log2.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log2.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4log2f(float)
 declare <2 x float> @_Z4log2Dv2_f(<2 x float>)
 declare <3 x float> @_Z4log2Dv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-mad.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-mad.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z3madfff(float, float, float)
 declare <2 x float> @_Z3madDv2_fS_S_(<2 x float>, <2 x float>, <2 x float>)
 declare <3 x float> @_Z3madDv3_fS_S_(<3 x float>, <3 x float>, <3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib,instcombine -amdgpu-prelink %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z3powff(float, float)
 declare <2 x float> @_Z3powDv2_fS_(<2 x float>, <2 x float>)
 declare <3 x float> @_Z3powDv3_fS_(<3 x float>, <3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib,instcombine -amdgpu-prelink %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4pownfi(float, i32)
 declare <2 x float> @_Z4pownDv2_fDv2_i(<2 x float>, <2 x i32>)
 declare <3 x float> @_Z4pownDv3_fDv3_i(<3 x float>, <3 x i32>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib,instcombine -amdgpu-prelink %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4powrff(float, float)
 declare <2 x float> @_Z4powrDv2_fS_(<2 x float>, <2 x float>)
 declare <3 x float> @_Z4powrDv3_fS_(<3 x float>, <3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rint.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rint.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4rintf(float)
 declare <2 x float> @_Z4rintDv2_f(<2 x float>)
 declare <3 x float> @_Z4rintDv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 4
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib,instcombine -amdgpu-prelink %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z5rootnfi(float, i32)
 declare <2 x float> @_Z5rootnDv2_fDv2_i(<2 x float>, <2 x i32>)
 declare <3 x float> @_Z5rootnDv3_fDv3_i(<3 x float>, <3 x i32>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-round.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-round.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z5roundf(float)
 declare <2 x float> @_Z5roundDv2_f(<2 x float>)
 declare <3 x float> @_Z5roundDv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-simplifylib < %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 ; sin, cos, and sincos are already defined in the module.
 
 define float @_Z3sinf(float %x) {
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.sin.cos.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.sin.cos.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-simplifylib < %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 ; sin and cos are already defined in the module but sincos isn't.
 
 define float @_Z3sinf(float noundef %x) {
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -O1 -mtriple=amdgcn-- -amdgpu-simplify-libcall=1 -amdgpu-prelink < %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z3sinf(float) #0
 declare float @_Z3cosf(float) #0
 declare <2 x float> @_Z3sinDv2_f(<2 x float>) #0
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.nobuiltins.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.nobuiltins.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-attributes --check-globals --version 2
 ; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-simplifylib -amdgpu-prelink < %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z3sinf(float noundef)
 declare float @_Z3cosf(float noundef)
 declare <2 x float> @_Z3sinDv2_f(<2 x float> noundef)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.weak.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.weak.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-simplifylib < %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare extern_weak float @_Z3sinf(float noundef)
 declare extern_weak float @_Z3cosf(float noundef)
 
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sqrt.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sqrt.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z4sqrtf(float)
 declare <2 x float> @_Z4sqrtDv2_f(<2 x float>)
 declare <3 x float> @_Z4sqrtDv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 declare float @_Z5truncf(float)
 declare <2 x float> @_Z5truncDv2_f(<2 x float>)
 declare <3 x float> @_Z5truncDv3_f(<3 x float>)
diff --git a/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll b/llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
@@ -2,12 +2,10 @@
 ; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=amdgcn-unknown-unknown -mcpu=bonaire < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-CI -check-prefix=OPT-SICIVI %s
 ; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=amdgcn-unknown-unknown -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-VI -check-prefix=OPT-SICIVI %s
 ; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=amdgcn-unknown-unknown -mcpu=gfx900 < %s | FileCheck -check-prefix=OPT -check-prefix=OPT-GFX9 %s
-; RUN: llc -mcpu=tahiti -mattr=-promote-alloca -amdgpu-scalarize-global-loads=false < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=SICIVI %s
-; RUN: llc -mcpu=bonaire -mattr=-promote-alloca -amdgpu-scalarize-global-loads=false < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=SICIVI %s
-; RUN: llc -mcpu=tonga -mattr=-flat-for-global -amdgpu-scalarize-global-loads=false -mattr=-promote-alloca < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=SICIVI %s
-; RUN: llc -mcpu=gfx900 -mattr=-promote-alloca -amdgpu-scalarize-global-loads=false < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
-
-target triple = "amdgcn"
+; RUN: llc -mtriple=amdgcn -mcpu=tahiti -mattr=-promote-alloca -amdgpu-scalarize-global-loads=false < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=SICIVI %s
+; RUN: llc -mtriple=amdgcn -mcpu=bonaire -mattr=-promote-alloca -amdgpu-scalarize-global-loads=false < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=SICIVI %s
+; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -amdgpu-scalarize-global-loads=false -mattr=-promote-alloca < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=SICIVI %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=-promote-alloca -amdgpu-scalarize-global-loads=false < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
 
 ; OPT-LABEL: @test_sink_global_small_offset_i32(
 ; OPT-CI-NOT: getelementptr i32, ptr addrspace(1) %in
diff --git a/llvm/test/CodeGen/AMDGPU/copy-hoist-no-spills.ll b/llvm/test/CodeGen/AMDGPU/copy-hoist-no-spills.ll
@@ -1,6 +1,5 @@
 ; NOTE: There must be no spill reload inside the loop starting with LBB0_1:
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 < %s | FileCheck %s
-target triple = "amdgcn-amd-amdhsa"
 
 define amdgpu_kernel void @foo(ptr %.sroa.1.0.copyload, ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ptr %8, ptr %9, ptr %10, ptr %11, ptr %12, ptr %13, ptr %14, ptr %15, ptr %16, ptr %17, ptr %18, ptr %19, ptr %20, ptr %21, ptr %22, ptr %23, ptr %24, ptr %25, ptr %26, ptr %27, ptr %28, ptr %29, ptr %30, ptr %31, ptr %32, ptr %33, double %34, double %35, double %36, float %37, float %38, float %39, float %40, ptr %41) {
 ; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll b/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
@@ -3,8 +3,6 @@
 
 ; ModuleID = 'kernel_round1_passing.bc'
 source_filename = "/tmp/comgr-295d04/input/CompileSource"
-target triple = "amdgcn-amd-amdhsa"
-
 @kernel_round1.first_words_data = external hidden unnamed_addr addrspace(3) global [896 x i8], align 1
 @kernel_round1.collisionsData = external hidden unnamed_addr addrspace(3) global [3840 x i32], align 4
 @kernel_round1.collisionsNum = external hidden addrspace(3) global i32, align 4
diff --git a/llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll b/llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
@@ -6,8 +6,6 @@
 ; because all functions involving convergence tokens will fail the
 ; machine verifier after register allocation.
 
-target triple = "amdgcn-amd-amdhsa"
-
 define void @tail_call_uniform_vgpr_value_convergence_tokens() #0 {
   ; CHECK-LABEL: name: tail_call_uniform_vgpr_value_convergence_tokens
   ; CHECK: bb.0 (%ir-block.0):
diff --git a/llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.ll b/llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.ll
@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s
 
-target triple = "amdgcn-amd-amdhsa"
-
 ; The tail call target is known uniform, but will be in a VGPR, so we
 ; need readfirstlane to legalize it.
 define void @tail_call_uniform_vgpr_value() {
