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update & add extra tests, support lamcas in sys:getHostCPUFeatures and add some additional descriptions
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‎clang/lib/Basic/Targets/LoongArch.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -205,7 +205,8 @@ void LoongArchTargetInfo::getTargetDefines(const LangOptions &Opts,
205205
// TODO: As more features of the V1.1 ISA are supported, a unified "v1.1"
206206
// arch feature set will be used to include all sub-features belonging to
207207
// the V1.1 ISA version.
208-
if (HasFeatureFrecipe && HasFeatureLAM_BH && HasFeatureLAMCAS && HasFeatureLD_SEQ_SA)
208+
if (HasFeatureFrecipe && HasFeatureLAM_BH && HasFeatureLAMCAS &&
209+
HasFeatureLD_SEQ_SA)
209210
Builder.defineMacro("__loongarch_arch",
210211
Twine('"') + "la64v1.1" + Twine('"'));
211212
else

‎clang/test/Driver/loongarch-march.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@
5353
// IR-LA464: attributes #[[#]] ={{.*}}"target-cpu"="la464" {{.*}}"target-features"="+64bit,+d,+f,+lasx,+lsx,+ual"
5454
// IR-LA64V1P0: attributes #[[#]] ={{.*}}"target-cpu"="loongarch64" {{.*}}"target-features"="+64bit,+d,+lsx,+ual"
5555
// IR-LA64V1P1: attributes #[[#]] ={{.*}}"target-cpu"="loongarch64" {{.*}}"target-features"="+64bit,+d,+frecipe,+lam-bh,+lamcas,+ld-seq-sa,+lsx,+ual"
56-
// IR-LA664: attributes #[[#]] ={{.*}}"target-cpu"="la664" {{.*}}"target-features"="+64bit,+d,+f,+frecipe,+lam-bh,+lamcas,+ld-seq-sa,+lasx,+lsx,+ual"
56+
// IR-LA664: attributes #[[#]] ={{.*}}"target-cpu"="la664" {{.*}}"target-features"="+64bit,+d,+f,+frecipe,+lam-bh,+lamcas,+lasx,+ld-seq-sa,+lsx,+ual"
5757

5858
int foo(void) {
5959
return 3;

‎clang/test/Preprocessor/init-loongarch.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -825,7 +825,7 @@
825825
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.1 | \
826826
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LAMCAS,LD-SEQ-SA -DARCH=la64v1.1 -DTUNE=loongarch64 %s
827827
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.1 -Xclang -target-feature -Xclang -frecipe | \
828-
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LAM-BH,LAMCAS,lD-SEQ-SA -DARCH=la64v1.0 -DTUNE=loongarch64 %s
828+
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LAM-BH,LAMCAS,LD-SEQ-SA -DARCH=la64v1.0 -DTUNE=loongarch64 %s
829829
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.1 -Xclang -target-feature -Xclang -lsx | \
830830
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LAMCAS,LD-SEQ-SA -DARCH=loongarch64 -DTUNE=loongarch64 %s
831831
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +frecipe | \

‎llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5748,6 +5748,10 @@ bool LoongArchTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
57485748
}
57495749
}
57505750

5751+
// When -mlamcas is enabled, MinCmpXchgSizeInBits will be set to 8,
5752+
// atomicrmw and/or/xor operations with operands less than 32 bits cannot be
5753+
// expanded to am{and/or/xor}[_db].w through AtomicExpandPass. To prevent
5754+
// regression, we need to implement it manually.
57515755
void LoongArchTargetLowering::emitExpandAtomicRMW(AtomicRMWInst *AI) const {
57525756
AtomicRMWInst::BinOp Op = AI->getOperation();
57535757

‎llvm/lib/TargetParser/Host.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2026,12 +2026,12 @@ const StringMap<bool> sys::getHostCPUFeatures() {
20262026

20272027
Features["frecipe"] = cpucfg2 & (1U << 25); // CPUCFG.2.FRECIPE
20282028
Features["lam-bh"] = cpucfg2 & (1U << 27); // CPUCFG.2.LAM_BH
2029+
Features["lamcas"] = cpucfg2 & (1U << 28); // CPUCFG.2.LAMCAS
20292030

20302031
Features["ld-seq-sa"] = cpucfg3 & (1U << 23); // CPUCFG.3.LD_SEQ_SA
20312032

20322033
// TODO: Need to complete.
20332034
// Features["div32"] = cpucfg2 & (1U << 26); // CPUCFG.2.DIV32
2034-
// Features["lamcas"] = cpucfg2 & (1U << 28); // CPUCFG.2.LAMCAS
20352035
// Features["llacq-screl"] = cpucfg2 & (1U << 29); // CPUCFG.2.LLACQ_SCREL
20362036
// Features["scq"] = cpucfg2 & (1U << 30); // CPUCFG.2.SCQ
20372037
return Features;

‎llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll‎

Lines changed: 97 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc --mtriple=loongarch64 -mattr=+d,-lamcas,-ld-seq-sa < %s | FileCheck %s --check-prefixes=LA64,NO-LD-SEQ-SA
2+
; RUN: llc --mtriple=loongarch64 -mattr=+d,-ld-seq-sa < %s | FileCheck %s --check-prefixes=LA64,NO-LD-SEQ-SA
33
; RUN: llc --mtriple=loongarch64 -mattr=+d,+ld-seq-sa < %s | FileCheck %s --check-prefixes=LA64,LD-SEQ-SA
44
; RUN: llc --mtriple=loongarch64 -mattr=+d,+lamcas < %s | FileCheck %s --check-prefix=LA64-LAMCAS
55

@@ -170,6 +170,11 @@ define void @cmpxchg_i8_acquire_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
170170
; LD-SEQ-SA-NEXT: .LBB4_3:
171171
; LD-SEQ-SA-NEXT: .LBB4_4:
172172
; LD-SEQ-SA-NEXT: ret
173+
;
174+
; LA64-LAMCAS-LABEL: cmpxchg_i8_acquire_monotonic:
175+
; LA64-LAMCAS: # %bb.0:
176+
; LA64-LAMCAS-NEXT: amcas_db.b $a1, $a2, $a0
177+
; LA64-LAMCAS-NEXT: ret
173178
%res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acquire monotonic
174179
ret void
175180
}
@@ -225,6 +230,11 @@ define void @cmpxchg_i16_acquire_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwin
225230
; LD-SEQ-SA-NEXT: .LBB5_3:
226231
; LD-SEQ-SA-NEXT: .LBB5_4:
227232
; LD-SEQ-SA-NEXT: ret
233+
;
234+
; LA64-LAMCAS-LABEL: cmpxchg_i16_acquire_monotonic:
235+
; LA64-LAMCAS: # %bb.0:
236+
; LA64-LAMCAS-NEXT: amcas_db.h $a1, $a2, $a0
237+
; LA64-LAMCAS-NEXT: ret
228238
%res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acquire monotonic
229239
ret void
230240
}
@@ -260,6 +270,11 @@ define void @cmpxchg_i32_acquire_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwin
260270
; LD-SEQ-SA-NEXT: .LBB6_3:
261271
; LD-SEQ-SA-NEXT: .LBB6_4:
262272
; LD-SEQ-SA-NEXT: ret
273+
;
274+
; LA64-LAMCAS-LABEL: cmpxchg_i32_acquire_monotonic:
275+
; LA64-LAMCAS: # %bb.0:
276+
; LA64-LAMCAS-NEXT: amcas_db.w $a1, $a2, $a0
277+
; LA64-LAMCAS-NEXT: ret
263278
%res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acquire monotonic
264279
ret void
265280
}
@@ -293,6 +308,11 @@ define void @cmpxchg_i64_acquire_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwin
293308
; LD-SEQ-SA-NEXT: .LBB7_3:
294309
; LD-SEQ-SA-NEXT: .LBB7_4:
295310
; LD-SEQ-SA-NEXT: ret
311+
;
312+
; LA64-LAMCAS-LABEL: cmpxchg_i64_acquire_monotonic:
313+
; LA64-LAMCAS: # %bb.0:
314+
; LA64-LAMCAS-NEXT: amcas_db.d $a1, $a2, $a0
315+
; LA64-LAMCAS-NEXT: ret
296316
%res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acquire monotonic
297317
ret void
298318
}
@@ -620,6 +640,11 @@ define void @cmpxchg_i8_monotonic_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind
620640
; LD-SEQ-SA-NEXT: .LBB16_3:
621641
; LD-SEQ-SA-NEXT: .LBB16_4:
622642
; LD-SEQ-SA-NEXT: ret
643+
;
644+
; LA64-LAMCAS-LABEL: cmpxchg_i8_monotonic_monotonic:
645+
; LA64-LAMCAS: # %bb.0:
646+
; LA64-LAMCAS-NEXT: amcas.b $a1, $a2, $a0
647+
; LA64-LAMCAS-NEXT: ret
623648
%res = cmpxchg ptr %ptr, i8 %cmp, i8 %val monotonic monotonic
624649
ret void
625650
}
@@ -675,6 +700,11 @@ define void @cmpxchg_i16_monotonic_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounw
675700
; LD-SEQ-SA-NEXT: .LBB17_3:
676701
; LD-SEQ-SA-NEXT: .LBB17_4:
677702
; LD-SEQ-SA-NEXT: ret
703+
;
704+
; LA64-LAMCAS-LABEL: cmpxchg_i16_monotonic_monotonic:
705+
; LA64-LAMCAS: # %bb.0:
706+
; LA64-LAMCAS-NEXT: amcas.h $a1, $a2, $a0
707+
; LA64-LAMCAS-NEXT: ret
678708
%res = cmpxchg ptr %ptr, i16 %cmp, i16 %val monotonic monotonic
679709
ret void
680710
}
@@ -710,6 +740,11 @@ define void @cmpxchg_i32_monotonic_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounw
710740
; LD-SEQ-SA-NEXT: .LBB18_3:
711741
; LD-SEQ-SA-NEXT: .LBB18_4:
712742
; LD-SEQ-SA-NEXT: ret
743+
;
744+
; LA64-LAMCAS-LABEL: cmpxchg_i32_monotonic_monotonic:
745+
; LA64-LAMCAS: # %bb.0:
746+
; LA64-LAMCAS-NEXT: amcas.w $a1, $a2, $a0
747+
; LA64-LAMCAS-NEXT: ret
713748
%res = cmpxchg ptr %ptr, i32 %cmp, i32 %val monotonic monotonic
714749
ret void
715750
}
@@ -743,6 +778,11 @@ define void @cmpxchg_i64_monotonic_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounw
743778
; LD-SEQ-SA-NEXT: .LBB19_3:
744779
; LD-SEQ-SA-NEXT: .LBB19_4:
745780
; LD-SEQ-SA-NEXT: ret
781+
;
782+
; LA64-LAMCAS-LABEL: cmpxchg_i64_monotonic_monotonic:
783+
; LA64-LAMCAS: # %bb.0:
784+
; LA64-LAMCAS-NEXT: amcas.d $a1, $a2, $a0
785+
; LA64-LAMCAS-NEXT: ret
746786
%res = cmpxchg ptr %ptr, i64 %cmp, i64 %val monotonic monotonic
747787
ret void
748788
}
@@ -798,6 +838,12 @@ define i8 @cmpxchg_i8_monotonic_monotonic_reti8(ptr %ptr, i8 %cmp, i8 %val) noun
798838
; LD-SEQ-SA-NEXT: .LBB20_4:
799839
; LD-SEQ-SA-NEXT: srl.w $a0, $a5, $a3
800840
; LD-SEQ-SA-NEXT: ret
841+
;
842+
; LA64-LAMCAS-LABEL: cmpxchg_i8_monotonic_monotonic_reti8:
843+
; LA64-LAMCAS: # %bb.0:
844+
; LA64-LAMCAS-NEXT: amcas.b $a1, $a2, $a0
845+
; LA64-LAMCAS-NEXT: move $a0, $a1
846+
; LA64-LAMCAS-NEXT: ret
801847
%tmp = cmpxchg ptr %ptr, i8 %cmp, i8 %val monotonic monotonic
802848
%res = extractvalue { i8, i1 } %tmp, 0
803849
ret i8 %res
@@ -856,6 +902,12 @@ define i16 @cmpxchg_i16_monotonic_monotonic_reti16(ptr %ptr, i16 %cmp, i16 %val)
856902
; LD-SEQ-SA-NEXT: .LBB21_4:
857903
; LD-SEQ-SA-NEXT: srl.w $a0, $a5, $a3
858904
; LD-SEQ-SA-NEXT: ret
905+
;
906+
; LA64-LAMCAS-LABEL: cmpxchg_i16_monotonic_monotonic_reti16:
907+
; LA64-LAMCAS: # %bb.0:
908+
; LA64-LAMCAS-NEXT: amcas.h $a1, $a2, $a0
909+
; LA64-LAMCAS-NEXT: move $a0, $a1
910+
; LA64-LAMCAS-NEXT: ret
859911
%tmp = cmpxchg ptr %ptr, i16 %cmp, i16 %val monotonic monotonic
860912
%res = extractvalue { i16, i1 } %tmp, 0
861913
ret i16 %res
@@ -894,6 +946,12 @@ define i32 @cmpxchg_i32_monotonic_monotonic_reti32(ptr %ptr, i32 %cmp, i32 %val)
894946
; LD-SEQ-SA-NEXT: .LBB22_4:
895947
; LD-SEQ-SA-NEXT: move $a0, $a1
896948
; LD-SEQ-SA-NEXT: ret
949+
;
950+
; LA64-LAMCAS-LABEL: cmpxchg_i32_monotonic_monotonic_reti32:
951+
; LA64-LAMCAS: # %bb.0:
952+
; LA64-LAMCAS-NEXT: amcas.w $a1, $a2, $a0
953+
; LA64-LAMCAS-NEXT: move $a0, $a1
954+
; LA64-LAMCAS-NEXT: ret
897955
%tmp = cmpxchg ptr %ptr, i32 %cmp, i32 %val monotonic monotonic
898956
%res = extractvalue { i32, i1 } %tmp, 0
899957
ret i32 %res
@@ -930,6 +988,12 @@ define i64 @cmpxchg_i64_monotonic_monotonic_reti64(ptr %ptr, i64 %cmp, i64 %val)
930988
; LD-SEQ-SA-NEXT: .LBB23_4:
931989
; LD-SEQ-SA-NEXT: move $a0, $a3
932990
; LD-SEQ-SA-NEXT: ret
991+
;
992+
; LA64-LAMCAS-LABEL: cmpxchg_i64_monotonic_monotonic_reti64:
993+
; LA64-LAMCAS: # %bb.0:
994+
; LA64-LAMCAS-NEXT: amcas.d $a1, $a2, $a0
995+
; LA64-LAMCAS-NEXT: move $a0, $a1
996+
; LA64-LAMCAS-NEXT: ret
933997
%tmp = cmpxchg ptr %ptr, i64 %cmp, i64 %val monotonic monotonic
934998
%res = extractvalue { i64, i1 } %tmp, 0
935999
ret i64 %res
@@ -990,6 +1054,14 @@ define i1 @cmpxchg_i8_monotonic_monotonic_reti1(ptr %ptr, i8 %cmp, i8 %val) noun
9901054
; LD-SEQ-SA-NEXT: xor $a0, $a1, $a0
9911055
; LD-SEQ-SA-NEXT: sltui $a0, $a0, 1
9921056
; LD-SEQ-SA-NEXT: ret
1057+
;
1058+
; LA64-LAMCAS-LABEL: cmpxchg_i8_monotonic_monotonic_reti1:
1059+
; LA64-LAMCAS: # %bb.0:
1060+
; LA64-LAMCAS-NEXT: ext.w.b $a3, $a1
1061+
; LA64-LAMCAS-NEXT: amcas.b $a1, $a2, $a0
1062+
; LA64-LAMCAS-NEXT: xor $a0, $a1, $a3
1063+
; LA64-LAMCAS-NEXT: sltui $a0, $a0, 1
1064+
; LA64-LAMCAS-NEXT: ret
9931065
%tmp = cmpxchg ptr %ptr, i8 %cmp, i8 %val monotonic monotonic
9941066
%res = extractvalue { i8, i1 } %tmp, 1
9951067
ret i1 %res
@@ -1052,6 +1124,14 @@ define i1 @cmpxchg_i16_monotonic_monotonic_reti1(ptr %ptr, i16 %cmp, i16 %val) n
10521124
; LD-SEQ-SA-NEXT: xor $a0, $a1, $a0
10531125
; LD-SEQ-SA-NEXT: sltui $a0, $a0, 1
10541126
; LD-SEQ-SA-NEXT: ret
1127+
;
1128+
; LA64-LAMCAS-LABEL: cmpxchg_i16_monotonic_monotonic_reti1:
1129+
; LA64-LAMCAS: # %bb.0:
1130+
; LA64-LAMCAS-NEXT: ext.w.h $a3, $a1
1131+
; LA64-LAMCAS-NEXT: amcas.h $a1, $a2, $a0
1132+
; LA64-LAMCAS-NEXT: xor $a0, $a1, $a3
1133+
; LA64-LAMCAS-NEXT: sltui $a0, $a0, 1
1134+
; LA64-LAMCAS-NEXT: ret
10551135
%tmp = cmpxchg ptr %ptr, i16 %cmp, i16 %val monotonic monotonic
10561136
%res = extractvalue { i16, i1 } %tmp, 1
10571137
ret i1 %res
@@ -1092,6 +1172,14 @@ define i1 @cmpxchg_i32_monotonic_monotonic_reti1(ptr %ptr, i32 %cmp, i32 %val) n
10921172
; LD-SEQ-SA-NEXT: xor $a0, $a3, $a1
10931173
; LD-SEQ-SA-NEXT: sltui $a0, $a0, 1
10941174
; LD-SEQ-SA-NEXT: ret
1175+
;
1176+
; LA64-LAMCAS-LABEL: cmpxchg_i32_monotonic_monotonic_reti1:
1177+
; LA64-LAMCAS: # %bb.0:
1178+
; LA64-LAMCAS-NEXT: addi.w $a3, $a1, 0
1179+
; LA64-LAMCAS-NEXT: amcas.w $a1, $a2, $a0
1180+
; LA64-LAMCAS-NEXT: xor $a0, $a1, $a3
1181+
; LA64-LAMCAS-NEXT: sltui $a0, $a0, 1
1182+
; LA64-LAMCAS-NEXT: ret
10951183
%tmp = cmpxchg ptr %ptr, i32 %cmp, i32 %val monotonic monotonic
10961184
%res = extractvalue { i32, i1 } %tmp, 1
10971185
ret i1 %res
@@ -1130,6 +1218,14 @@ define i1 @cmpxchg_i64_monotonic_monotonic_reti1(ptr %ptr, i64 %cmp, i64 %val) n
11301218
; LD-SEQ-SA-NEXT: xor $a0, $a3, $a1
11311219
; LD-SEQ-SA-NEXT: sltui $a0, $a0, 1
11321220
; LD-SEQ-SA-NEXT: ret
1221+
;
1222+
; LA64-LAMCAS-LABEL: cmpxchg_i64_monotonic_monotonic_reti1:
1223+
; LA64-LAMCAS: # %bb.0:
1224+
; LA64-LAMCAS-NEXT: move $a3, $a1
1225+
; LA64-LAMCAS-NEXT: amcas.d $a3, $a2, $a0
1226+
; LA64-LAMCAS-NEXT: xor $a0, $a3, $a1
1227+
; LA64-LAMCAS-NEXT: sltui $a0, $a0, 1
1228+
; LA64-LAMCAS-NEXT: ret
11331229
%tmp = cmpxchg ptr %ptr, i64 %cmp, i64 %val monotonic monotonic
11341230
%res = extractvalue { i64, i1 } %tmp, 1
11351231
ret i1 %res

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