Make target and language ASs distinct for the checks.

jhuber6 · jhuber6 · commit 24d6d018885d · 2024-11-13T11:19:22.000-06:00
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
@@ -726,10 +726,9 @@ class Qualifiers {
            (A == LangAS::Default &&
             (B == LangAS::cuda_constant || B == LangAS::cuda_device ||
              B == LangAS::cuda_shared)) ||
-           // The AMDPGU and NVPTX targets allow all supported address spaces to
-           // be casted to the default address space.
-           (TI.getTriple().isNVPTX() && A == LangAS::Default) ||
-           (TI.getTriple().isAMDGPU() && A == LangAS::Default);
+           // Conversions from target specific address spaces may be legal
+           // depending on the target information.
+           TI.isAddressSpaceSupersetOf(A, B);
   }
 
   /// Returns true if the address space in these qualifiers is equal to or
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
@@ -486,6 +486,13 @@ class TargetInfo : public TransferrableTargetInfo,
   /// \param AddrSpace address space of pointee in source language.
   virtual uint64_t getNullPointerValue(LangAS AddrSpace) const { return 0; }
 
+  /// Returns true if an address space can be safely converted to another.
+  /// \param A address space of target in source language.
+  /// \param B address space of source in source language.
+  virtual bool isAddressSpaceSupersetOf(LangAS A, LangAS B) const {
+    return A == B;
+  }
+
   /// Return the size of '_Bool' and C++ 'bool' for this target, in bits.
   unsigned getBoolWidth() const { return BoolWidth; }
 
diff --git a/clang/lib/Basic/Targets/AMDGPU.h b/clang/lib/Basic/Targets/AMDGPU.h
@@ -111,6 +111,19 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
     return getPointerWidthV(AddrSpace);
   }
 
+  virtual bool isAddressSpaceSupersetOf(LangAS A, LangAS B) const override {
+    // The flat address space AS(0) is a superset of all the other address
+    // spaces used by the backend target.
+    return A == B ||
+           (A == LangAS::Default ||
+            (isTargetAddressSpace(A) &&
+             toTargetAddressSpace(A) == llvm::AMDGPUAS::FLAT_ADDRESS)) &&
+               isTargetAddressSpace(B) &&
+               toTargetAddressSpace(B) >= llvm::AMDGPUAS::FLAT_ADDRESS &&
+               isTargetAddressSpace(B) &&
+               toTargetAddressSpace(B) <= llvm::AMDGPUAS::PRIVATE_ADDRESS;
+  }
+
   uint64_t getMaxPointerWidth() const override {
     return getTriple().getArch() == llvm::Triple::amdgcn ? 64 : 32;
   }
diff --git a/clang/lib/Basic/Targets/NVPTX.h b/clang/lib/Basic/Targets/NVPTX.h
@@ -17,34 +17,34 @@
 #include "clang/Basic/TargetInfo.h"
 #include "clang/Basic/TargetOptions.h"
 #include "llvm/Support/Compiler.h"
+#include "llvm/Support/NVPTXAddrSpace.h"
 #include "llvm/TargetParser/Triple.h"
 #include <optional>
 
 namespace clang {
 namespace targets {
 
 static const unsigned NVPTXAddrSpaceMap[] = {
-    0, // Default
-    1, // opencl_global
-    3, // opencl_local
-    4, // opencl_constant
-    0, // opencl_private
-    // FIXME: generic has to be added to the target
-    0, // opencl_generic
-    1, // opencl_global_device
-    1, // opencl_global_host
-    1, // cuda_device
-    4, // cuda_constant
-    3, // cuda_shared
-    1, // sycl_global
-    1, // sycl_global_device
-    1, // sycl_global_host
-    3, // sycl_local
-    0, // sycl_private
-    0, // ptr32_sptr
-    0, // ptr32_uptr
-    0, // ptr64
-    0, // hlsl_groupshared
+    llvm::NVPTXAS::ADDRESS_SPACE_GENERIC, // Default
+    llvm::NVPTXAS::ADDRESS_SPACE_GLOBAL,  // opencl_global
+    llvm::NVPTXAS::ADDRESS_SPACE_SHARED,  // opencl_local
+    llvm::NVPTXAS::ADDRESS_SPACE_CONST,   // opencl_constant
+    llvm::NVPTXAS::ADDRESS_SPACE_GENERIC, // opencl_private
+    llvm::NVPTXAS::ADDRESS_SPACE_GENERIC, // opencl_generic
+    llvm::NVPTXAS::ADDRESS_SPACE_GLOBAL,  // opencl_global_device
+    llvm::NVPTXAS::ADDRESS_SPACE_GLOBAL,  // opencl_global_host
+    llvm::NVPTXAS::ADDRESS_SPACE_GLOBAL,  // cuda_device
+    llvm::NVPTXAS::ADDRESS_SPACE_CONST,   // cuda_constant
+    llvm::NVPTXAS::ADDRESS_SPACE_SHARED,  // cuda_shared
+    llvm::NVPTXAS::ADDRESS_SPACE_GLOBAL,  // sycl_global
+    llvm::NVPTXAS::ADDRESS_SPACE_GLOBAL,  // sycl_global_device
+    llvm::NVPTXAS::ADDRESS_SPACE_GLOBAL,  // sycl_global_host
+    llvm::NVPTXAS::ADDRESS_SPACE_SHARED,  // sycl_local
+    llvm::NVPTXAS::ADDRESS_SPACE_GENERIC, // sycl_private
+    llvm::NVPTXAS::ADDRESS_SPACE_GENERIC, // ptr32_sptr
+    llvm::NVPTXAS::ADDRESS_SPACE_GENERIC, // ptr32_uptr
+    llvm::NVPTXAS::ADDRESS_SPACE_GENERIC, // ptr64
+    llvm::NVPTXAS::ADDRESS_SPACE_GENERIC, // hlsl_groupshared
     // Wasm address space values for this target are dummy values,
     // as it is only enabled for Wasm targets.
     20, // wasm_funcref
@@ -89,6 +89,21 @@ class LLVM_LIBRARY_VISIBILITY NVPTXTargetInfo : public TargetInfo {
 
   bool hasFeature(StringRef Feature) const override;
 
+  virtual bool isAddressSpaceSupersetOf(LangAS A, LangAS B) const override {
+    // The generic address space AS(0) is a superset of all the other address
+    // spaces used by the backend target.
+    return A == B ||
+           (A == LangAS::Default ||
+            (isTargetAddressSpace(A) &&
+             toTargetAddressSpace(A) ==
+                 llvm::NVPTXAS::ADDRESS_SPACE_GENERIC)) &&
+               isTargetAddressSpace(B) &&
+               toTargetAddressSpace(B) >=
+                   llvm::NVPTXAS::ADDRESS_SPACE_GENERIC &&
+               isTargetAddressSpace(B) &&
+               toTargetAddressSpace(B) <= llvm::NVPTXAS::ADDRESS_SPACE_LOCAL;
+  }
+
   ArrayRef<const char *> getGCCRegNames() const override;
 
   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
diff --git a/clang/test/CodeGen/target-addrspace.cpp b/clang/test/CodeGen/target-addrspace.cpp
@@ -40,7 +40,7 @@ void f(void *p) {}
 // AMDGPU-NEXT:    call void @_Z1fPv(ptr noundef [[TMP0]]) #[[ATTR1:[0-9]+]]
 // AMDGPU-NEXT:    ret void
 //
-void p1(void [[clang::opencl_generic]] * p) { f(p); }
+void p1(void [[clang::address_space(0)]] * p) { f(p); }
 // NVPTX-LABEL: define hidden noundef ptr @_Z2p2PU3AS3v(
 // NVPTX-SAME: ptr addrspace(3) noundef [[P:%.*]]) #[[ATTR0]] {
 // NVPTX-NEXT:  [[ENTRY:.*:]]
@@ -62,7 +62,7 @@ void p1(void [[clang::opencl_generic]] * p) { f(p); }
 // AMDGPU-NEXT:    [[TMP1:%.*]] = addrspacecast ptr addrspace(3) [[TMP0]] to ptr
 // AMDGPU-NEXT:    ret ptr [[TMP1]]
 //
-void *p2(void [[clang::opencl_local]] * p) { return p; }
+void *p2(void [[clang::address_space(3)]] * p) { return p; }
 // NVPTX-LABEL: define hidden noundef ptr @_Z2p3PU3AS3v(
 // NVPTX-SAME: ptr addrspace(3) noundef [[P:%.*]]) #[[ATTR0]] {
 // NVPTX-NEXT:  [[ENTRY:.*:]]
@@ -93,8 +93,8 @@ struct S {
 };
 
 S s1;
-S [[clang::opencl_global]] s2;
-S [[clang::opencl_local]] s3;
+S [[clang::address_space(1)]] s2;
+S [[clang::address_space(3)]] s3;
 
 template <typename Ty> void foo(Ty *) {}
 
@@ -137,7 +137,7 @@ void t1(void *p) { foo(p); }
 // AMDGPU-NEXT:    call void @_Z3fooIU3AS3vEvPT_(ptr addrspace(3) noundef [[TMP0]]) #[[ATTR1]]
 // AMDGPU-NEXT:    ret void
 //
-void t3(void [[clang::opencl_local]] *p) { foo(p); }
+void t3(void [[clang::address_space(3)]] *p) { foo(p); }
 // NVPTX-LABEL: define hidden void @_Z2t4PU5AS999v(
 // NVPTX-SAME: ptr addrspace(999) noundef [[P:%.*]]) #[[ATTR0]] {
 // NVPTX-NEXT:  [[ENTRY:.*:]]
@@ -158,4 +158,3 @@ void t3(void [[clang::opencl_local]] *p) { foo(p); }
 // AMDGPU-NEXT:    ret void
 //
 void t4(void [[clang::address_space(999)]] *p) { foo(p); }
-
