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Use bitmask for FMV priority and add a corresponding test.
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12 files changed

+75
-21
lines changed

12 files changed

+75
-21
lines changed

‎clang/include/clang/Basic/TargetInfo.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1531,7 +1531,7 @@ class TargetInfo : public TransferrableTargetInfo,
15311531

15321532
// Return the target-specific priority for features/cpus/vendors so
15331533
// that they can be properly sorted for checking.
1534-
virtual unsigned getFMVPriority(ArrayRef<StringRef> Features) const {
1534+
virtual uint64_t getFMVPriority(ArrayRef<StringRef> Features) const {
15351535
return 0;
15361536
}
15371537

‎clang/lib/Basic/Targets/AArch64.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -714,7 +714,7 @@ AArch64TargetInfo::getVScaleRange(const LangOptions &LangOpts) const {
714714
return std::nullopt;
715715
}
716716

717-
unsigned AArch64TargetInfo::getFMVPriority(ArrayRef<StringRef> Features) const {
717+
uint64_t AArch64TargetInfo::getFMVPriority(ArrayRef<StringRef> Features) const {
718718
return llvm::AArch64::getFMVPriority(Features);
719719
}
720720

‎clang/lib/Basic/Targets/AArch64.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -137,7 +137,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
137137
void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
138138
bool setCPU(const std::string &Name) override;
139139

140-
unsigned getFMVPriority(ArrayRef<StringRef> Features) const override;
140+
uint64_t getFMVPriority(ArrayRef<StringRef> Features) const override;
141141

142142
bool useFP16ConversionIntrinsics() const override {
143143
return false;

‎clang/lib/Basic/Targets/RISCV.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -489,7 +489,7 @@ ParsedTargetAttr RISCVTargetInfo::parseTargetAttr(StringRef Features) const {
489489
return Ret;
490490
}
491491

492-
unsigned RISCVTargetInfo::getFMVPriority(ArrayRef<StringRef> Features) const {
492+
uint64_t RISCVTargetInfo::getFMVPriority(ArrayRef<StringRef> Features) const {
493493
// Priority is explicitly specified on RISC-V unlike on other targets, where
494494
// it is derived by all the features of a specific version. Therefore if a
495495
// feature contains the priority string, then return it immediately.
@@ -501,7 +501,7 @@ unsigned RISCVTargetInfo::getFMVPriority(ArrayRef<StringRef> Features) const {
501501
Feature = RHS;
502502
else
503503
continue;
504-
unsigned Priority;
504+
uint64_t Priority;
505505
if (!Feature.getAsInteger(0, Priority))
506506
return Priority;
507507
}

‎clang/lib/Basic/Targets/RISCV.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,7 @@ class RISCVTargetInfo : public TargetInfo {
122122
void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override;
123123
bool supportsTargetAttributeTune() const override { return true; }
124124
ParsedTargetAttr parseTargetAttr(StringRef Str) const override;
125-
unsigned getFMVPriority(ArrayRef<StringRef> Features) const override;
125+
uint64_t getFMVPriority(ArrayRef<StringRef> Features) const override;
126126

127127
std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
128128
return std::make_pair(32, 32);

‎clang/lib/Basic/Targets/X86.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1357,8 +1357,8 @@ static llvm::X86::ProcessorFeatures getFeature(StringRef Name) {
13571357
// correct, so it asserts if the value is out of range.
13581358
}
13591359

1360-
unsigned X86TargetInfo::getFMVPriority(ArrayRef<StringRef> Features) const {
1361-
auto getPriority = [](StringRef Feature) -> unsigned {
1360+
uint64_t X86TargetInfo::getFMVPriority(ArrayRef<StringRef> Features) const {
1361+
auto getPriority = [](StringRef Feature) -> uint64_t {
13621362
// Valid CPUs have a 'key feature' that compares just better than its key
13631363
// feature.
13641364
using namespace llvm::X86;
@@ -1372,7 +1372,7 @@ unsigned X86TargetInfo::getFMVPriority(ArrayRef<StringRef> Features) const {
13721372
return getFeaturePriority(getFeature(Feature)) << 1;
13731373
};
13741374

1375-
unsigned Priority = 0;
1375+
uint64_t Priority = 0;
13761376
for (StringRef Feature : Features)
13771377
if (!Feature.empty())
13781378
Priority = std::max(Priority, getPriority(Feature));

‎clang/lib/Basic/Targets/X86.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -384,7 +384,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
384384
return CPU != llvm::X86::CK_None;
385385
}
386386

387-
unsigned getFMVPriority(ArrayRef<StringRef> Features) const override;
387+
uint64_t getFMVPriority(ArrayRef<StringRef> Features) const override;
388388

389389
bool setFPMath(StringRef Name) override;
390390

‎clang/lib/CodeGen/CodeGenModule.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4241,7 +4241,7 @@ void CodeGenModule::EmitGlobalDefinition(GlobalDecl GD, llvm::GlobalValue *GV) {
42414241
static void ReplaceUsesOfNonProtoTypeWithRealFunction(llvm::GlobalValue *Old,
42424242
llvm::Function *NewFn);
42434243

4244-
static unsigned getFMVPriority(const TargetInfo &TI,
4244+
static uint64_t getFMVPriority(const TargetInfo &TI,
42454245
const CodeGenFunction::FMVResolverOption &RO) {
42464246
llvm::SmallVector<StringRef, 8> Features{RO.Features};
42474247
if (RO.Architecture)

‎clang/test/CodeGen/AArch64/fmv-priority.c‎

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,54 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --version 5
2+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -o - %s | FileCheck %s
3+
4+
// Priority biskmasks after feature dependency expansion:
5+
//
6+
// MSB LSB
7+
//
8+
// sme2 | ls64 | sme | bf16 | | | fp16 | simd | fp
9+
// -----+------+-----+------+-------+------+------+------+---
10+
// sme2 | | sme | bf16 | rcpc2 | rcpc | fp16 | simd | fp
11+
//
12+
// Dependencies should not affect priorities, since a
13+
// feature can only depend on lower priority features.
14+
15+
__attribute__((target_version("sme2+ls64"))) int fn(void);
16+
__attribute__((target_version("sme2+rcpc2"))) int fn(void);
17+
__attribute__((target_version("default"))) int fn(void) { return 0; }
18+
19+
int call() { return fn(); }
20+
21+
// CHECK-LABEL: define dso_local i32 @fn.default(
22+
// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
23+
// CHECK-NEXT: [[ENTRY:.*:]]
24+
// CHECK-NEXT: ret i32 0
25+
//
26+
//
27+
// CHECK-LABEL: define dso_local i32 @call(
28+
// CHECK-SAME: ) #[[ATTR0]] {
29+
// CHECK-NEXT: [[ENTRY:.*:]]
30+
// CHECK-NEXT: [[CALL:%.*]] = call i32 @fn()
31+
// CHECK-NEXT: ret i32 [[CALL]]
32+
//
33+
//
34+
// CHECK-LABEL: define weak_odr ptr @fn.resolver() comdat {
35+
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
36+
// CHECK-NEXT: call void @__init_cpu_features_resolver()
37+
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
38+
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 153126785511392000
39+
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 153126785511392000
40+
// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
41+
// CHECK-NEXT: br i1 [[TMP3]], label %[[RESOLVER_RETURN:.*]], label %[[RESOLVER_ELSE:.*]]
42+
// CHECK: [[RESOLVER_RETURN]]:
43+
// CHECK-NEXT: ret ptr @fn._Mls64Msme2
44+
// CHECK: [[RESOLVER_ELSE]]:
45+
// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
46+
// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 144119586269233920
47+
// CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 144119586269233920
48+
// CHECK-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]
49+
// CHECK-NEXT: br i1 [[TMP7]], label %[[RESOLVER_RETURN1:.*]], label %[[RESOLVER_ELSE2:.*]]
50+
// CHECK: [[RESOLVER_RETURN1]]:
51+
// CHECK-NEXT: ret ptr @fn._Mrcpc2Msme2
52+
// CHECK: [[RESOLVER_ELSE2]]:
53+
// CHECK-NEXT: ret ptr @fn.default
54+
//

‎clang/test/CodeGen/attr-target-version.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -479,20 +479,20 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
479479
// CHECK-NEXT: ret ptr @fmv._Mflagm2Msme-i16i64
480480
// CHECK: resolver_else2:
481481
// CHECK-NEXT: [[TMP8:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
482-
// CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 9007199254741776
483-
// CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 9007199254741776
482+
// CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 9007199254742016
483+
// CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 9007199254742016
484484
// CHECK-NEXT: [[TMP11:%.*]] = and i1 true, [[TMP10]]
485485
// CHECK-NEXT: br i1 [[TMP11]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]
486486
// CHECK: resolver_return3:
487-
// CHECK-NEXT: ret ptr @fmv._MdotprodMls64
487+
// CHECK-NEXT: ret ptr @fmv._McrcMls64
488488
// CHECK: resolver_else4:
489489
// CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
490-
// CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], 9007199254742016
491-
// CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP13]], 9007199254742016
490+
// CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], 9007199254741776
491+
// CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP13]], 9007199254741776
492492
// CHECK-NEXT: [[TMP15:%.*]] = and i1 true, [[TMP14]]
493493
// CHECK-NEXT: br i1 [[TMP15]], label [[RESOLVER_RETURN5:%.*]], label [[RESOLVER_ELSE6:%.*]]
494494
// CHECK: resolver_return5:
495-
// CHECK-NEXT: ret ptr @fmv._McrcMls64
495+
// CHECK-NEXT: ret ptr @fmv._MdotprodMls64
496496
// CHECK: resolver_else6:
497497
// CHECK-NEXT: [[TMP16:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
498498
// CHECK-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 1125899906842624

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