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fixup: also check w* registers
1 parent 1f1fe3d commit 255ac95

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2 files changed

+17
-14
lines changed

2 files changed

+17
-14
lines changed

clang/lib/Basic/Targets/AArch64.cpp

Lines changed: 12 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -232,24 +232,23 @@ bool AArch64TargetInfo::validateTarget(DiagnosticsEngine &Diags) const {
232232

233233
bool AArch64TargetInfo::validateGlobalRegisterVariable(
234234
StringRef RegName, unsigned RegSize, bool &HasSizeMismatch) const {
235-
if (RegName.starts_with("w")) {
236-
HasSizeMismatch = RegSize != 32;
237-
return true;
238-
}
239235
if (RegName == "sp") {
240236
HasSizeMismatch = RegSize != 64;
241237
return true;
242238
}
243-
if (RegName.starts_with("x")) {
239+
if (RegName.starts_with("w"))
240+
HasSizeMismatch = RegSize != 32;
241+
else if (RegName.starts_with("x"))
244242
HasSizeMismatch = RegSize != 64;
245-
// Check if the register is reserved. See also
246-
// AArch64TargetLowering::getRegisterByName().
247-
return RegName == "x0" ||
248-
(RegName == "x18" &&
249-
llvm::AArch64::isX18ReservedByDefault(getTriple())) ||
250-
getTargetOpts().FeatureMap.lookup(("reserve-" + RegName).str());
251-
}
252-
return false;
243+
else
244+
return false;
245+
StringRef RegNum = RegName.drop_front();
246+
// Check if the register is reserved. See also
247+
// AArch64TargetLowering::getRegisterByName().
248+
return RegNum == "0" ||
249+
(RegNum == "18" &&
250+
llvm::AArch64::isX18ReservedByDefault(getTriple())) ||
251+
getTargetOpts().FeatureMap.lookup(("reserve-x" + RegNum).str());
253252
}
254253

255254
bool AArch64TargetInfo::validateBranchProtection(StringRef Spec, StringRef,
Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,13 @@
11
// RUN: %clang_cc1 -triple aarch64-unknown-none-gnu %s -target-feature +reserve-x4 -target-feature +reserve-x15 -verify -verify=no_x18 -fsyntax-only
22
// RUN: %clang_cc1 -triple aarch64-unknown-android %s -target-feature +reserve-x4 -target-feature +reserve-x15 -verify -fsyntax-only
33

4+
register int w0 __asm__ ("w0");
45
register long x0 __asm__ ("x0");
56
register char i1 __asm__ ("x15"); // expected-error {{size of register 'x15' does not match variable size}}
6-
register long long l2 __asm__ ("w14"); // expected-error {{size of register 'w14' does not match variable size}}
7+
register long long l2 __asm__ ("w15"); // expected-error {{size of register 'w15' does not match variable size}}
8+
register int w3 __asm__ ("w3"); // expected-error {{register 'w3' unsuitable for global register variables on this target}}
79
register long x3 __asm__ ("x3"); // expected-error {{register 'x3' unsuitable for global register variables on this target}}
10+
register int w4 __asm__ ("w4");
811
register long x4 __asm__ ("x4");
12+
register int w18 __asm__ ("w18"); // no_x18-error {{register 'w18' unsuitable for global register variables on this target}}
913
register long x18 __asm__ ("x18"); // no_x18-error {{register 'x18' unsuitable for global register variables on this target}}

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