@@ -3301,6 +3301,8 @@ entry:
33013301 ret i1 %cmp
33023302}
33033303
3304+ ; PR 152851
3305+
33043306define i1 @val_is_aligend_sub (i32 %num , i32 %val ) {
33053307; CHECK-LABEL: @val_is_aligend_sub(
33063308; CHECK-NEXT: [[TMP1:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 [[NUM:%.*]])
@@ -3406,8 +3408,8 @@ define i1 @val_is_aligend_const_pow2(i32 %num) {
34063408}
34073409
34083410; Should not work for non-power-of-two cases
3409- define i1 @val_is_aligend_const_non-pow2 (i32 %num ) {
3410- ; CHECK-LABEL: @val_is_aligend_const_non-pow2 (
3411+ define i1 @val_is_aligend_const_non_pow2 (i32 %num ) {
3412+ ; CHECK-LABEL: @val_is_aligend_const_non_pow2 (
34113413; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 6
34123414; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], -7
34133415; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
@@ -3436,3 +3438,62 @@ define i1 @val_is_aligend_non_pow(i32 %num, i32 %val) {
34363438 %_0 = icmp eq i32 %_2.sroa.0.0 , %num
34373439 ret i1 %_0
34383440}
3441+
3442+ define i1 @val_is_aligend_const_pow2_multiuse (i32 %num ) {
3443+ ; CHECK-LABEL: @val_is_aligend_const_pow2_multiuse(
3444+ ; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 4095
3445+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], -4096
3446+ ; CHECK-NEXT: call void @use(i32 [[_2_SROA_0_0]])
3447+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
3448+ ; CHECK-NEXT: ret i1 [[_0]]
3449+ ;
3450+ %num.biased = add i32 %num , 4095
3451+ %_2.sroa.0.0 = and i32 %num.biased , -4096
3452+ call void @use (i32 %_2.sroa.0.0 )
3453+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
3454+ ret i1 %_0
3455+ }
3456+
3457+ define i1 @val_is_aligend_const_pow2_multiuse1 (i32 %num ) {
3458+ ; CHECK-LABEL: @val_is_aligend_const_pow2_multiuse1(
3459+ ; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 4095
3460+ ; CHECK-NEXT: call void @use(i32 [[NUM_BIASED]])
3461+ ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM]], 4095
3462+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 0
3463+ ; CHECK-NEXT: ret i1 [[_0]]
3464+ ;
3465+ %num.biased = add i32 %num , 4095
3466+ call void @use (i32 %num.biased )
3467+ %_2.sroa.0.0 = and i32 %num.biased , -4096
3468+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
3469+ ret i1 %_0
3470+ }
3471+
3472+ define i1 @val_is_aligend_add_multiuse (i32 %num , i32 %val ) {
3473+ ; CHECK-LABEL: @val_is_aligend_add_multiuse(
3474+ ; CHECK-NEXT: [[TMP1:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 [[VAL:%.*]])
3475+ ; CHECK-NEXT: [[POW:%.*]] = icmp eq i32 [[TMP1]], 1
3476+ ; CHECK-NEXT: call void @llvm.assume(i1 [[POW]])
3477+ ; CHECK-NEXT: [[MASK:%.*]] = add i32 [[VAL]], -1
3478+ ; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[VAL]]
3479+ ; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], [[MASK]]
3480+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], [[NEG]]
3481+ ; CHECK-NEXT: call void @use(i32 [[_2_SROA_0_0]])
3482+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
3483+ ; CHECK-NEXT: ret i1 [[_0]]
3484+ ;
3485+ %1 = tail call range(i32 1 , 33 ) i32 @llvm.ctpop.i32 (i32 %val )
3486+ %pow = icmp eq i32 %1 , 1
3487+ call void @llvm.assume (i1 %pow )
3488+
3489+ %mask = add i32 %val , -1
3490+ %neg = sub nsw i32 0 , %val
3491+
3492+ %num.biased = add i32 %num , %mask
3493+ %_2.sroa.0.0 = and i32 %num.biased , %neg
3494+
3495+ call void @use (i32 %_2.sroa.0.0 )
3496+
3497+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
3498+ ret i1 %_0
3499+ }
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