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mshockwavemshockwave
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fixup! Update occupancies
1 parent 2c8582e commit 2617c5f

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+24
-24
lines changed

3 files changed

+24
-24
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‎llvm/lib/Target/RISCV/RISCVSchedSiFive7.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -950,14 +950,14 @@ multiclass SiFive7WriteResBase<int VLEN,
950950
// Mask reduction
951951
foreach mx = SchedMxList in {
952952
defvar IsWorstCase = SiFive7IsWorstCaseMX<mx, SchedMxList>.c;
953-
let Latency = 11, AcquireAtCycles = [0, 1], ReleaseAtCycles = [1, !add(1, 11)] in {
953+
let Latency = 11, AcquireAtCycles = [0, 1], ReleaseAtCycles = [1, !add(1, 3)] in {
954954
defm "" : LMULWriteResMX<"WriteVMFFSV", [VCQ, VA1], mx, IsWorstCase>;
955955
defm "" : LMULWriteResMX<"WriteVMPopV", [VCQ, VA1], mx, IsWorstCase>;
956956
}
957957
}
958958

959959
// 16. Vector Permutation Instructions
960-
let Latency = 11, AcquireAtCycles = [0, 1], ReleaseAtCycles = [1, !add(1, 11)] in {
960+
let Latency = 11, AcquireAtCycles = [0, 1], ReleaseAtCycles = [1, !add(1, 3)] in {
961961
def : WriteRes<WriteVMovXS, [VCQ, VA1]>;
962962
def : WriteRes<WriteVMovFS, [VCQ, VA1]>;
963963
}

‎llvm/test/tools/llvm-mca/RISCV/SiFive7/mask.s‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,8 @@ vmsof.m v8, v4
7575
# CHECK-NEXT: 1 5 2.00 5 VLEN512SiFive7VA[1,3],VLEN512SiFive7VCQ VMFNE_VV vmfne.vv v8, v4, v20
7676
# CHECK-NEXT: 1 4 2.00 4 VLEN512SiFive7VA[1,3],VLEN512SiFive7VCQ VMADC_VV vmadc.vv v8, v4, v20
7777
# CHECK-NEXT: 1 4 2.00 4 VLEN512SiFive7VA[1,3],VLEN512SiFive7VCQ VMSBC_VV vmsbc.vv v8, v4, v20
78-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VFIRST_M vfirst.m a2, v4
79-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VCPOP_M vcpop.m a2, v4
78+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VFIRST_M vfirst.m a2, v4
79+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VCPOP_M vcpop.m a2, v4
8080
# CHECK-NEXT: 1 4 2.00 4 VLEN512SiFive7VA[1,3],VLEN512SiFive7VCQ VIOTA_M viota.m v8, v4
8181
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VMSBF_M vmsbf.m v8, v4
8282
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VMSIF_M vmsif.m v8, v4
@@ -94,7 +94,7 @@ vmsof.m v8, v4
9494

9595
# CHECK: Resource pressure per iteration:
9696
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
97-
# CHECK-NEXT: - - 1.00 - 87.00 24.00 - -
97+
# CHECK-NEXT: - - 1.00 - 71.00 24.00 - -
9898

9999
# CHECK: Resource pressure by instruction:
100100
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
@@ -117,8 +117,8 @@ vmsof.m v8, v4
117117
# CHECK-NEXT: - - - - 3.00 1.00 - - vmfne.vv v8, v4, v20
118118
# CHECK-NEXT: - - - - 3.00 1.00 - - vmadc.vv v8, v4, v20
119119
# CHECK-NEXT: - - - - 3.00 1.00 - - vmsbc.vv v8, v4, v20
120-
# CHECK-NEXT: - - - - 12.00 1.00 - - vfirst.m a2, v4
121-
# CHECK-NEXT: - - - - 12.00 1.00 - - vcpop.m a2, v4
120+
# CHECK-NEXT: - - - - 4.00 1.00 - - vfirst.m a2, v4
121+
# CHECK-NEXT: - - - - 4.00 1.00 - - vcpop.m a2, v4
122122
# CHECK-NEXT: - - - - 3.00 1.00 - - viota.m v8, v4
123123
# CHECK-NEXT: - - - - 2.00 1.00 - - vmsbf.m v8, v4
124124
# CHECK-NEXT: - - - - 2.00 1.00 - - vmsif.m v8, v4

‎llvm/test/tools/llvm-mca/RISCV/SiFive7/vmv.s‎

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -475,28 +475,28 @@ vfmv.f.s f7, v16
475475
# CHECK-NEXT: 1 4 16.00 4 VLEN512SiFive7VA[1,17],VLEN512SiFive7VCQ VMV8R_V vmv8r.v v8, v16
476476
# CHECK-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu
477477
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VMV_S_X vmv.s.x v8, t0
478-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VMV_X_S vmv.x.s t2, v16
478+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VMV_X_S vmv.x.s t2, v16
479479
# CHECK-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu
480480
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VMV_S_X vmv.s.x v8, t0
481-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VMV_X_S vmv.x.s t2, v16
481+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VMV_X_S vmv.x.s t2, v16
482482
# CHECK-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu
483483
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VMV_S_X vmv.s.x v8, t0
484-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VMV_X_S vmv.x.s t2, v16
484+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VMV_X_S vmv.x.s t2, v16
485485
# CHECK-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu
486486
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VMV_S_X vmv.s.x v8, t0
487-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VMV_X_S vmv.x.s t2, v16
487+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VMV_X_S vmv.x.s t2, v16
488488
# CHECK-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu
489489
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VFMV_S_F vfmv.s.f v8, ft5
490-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VFMV_F_S vfmv.f.s ft7, v16
490+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VFMV_F_S vfmv.f.s ft7, v16
491491
# CHECK-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu
492492
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VFMV_S_F vfmv.s.f v8, ft5
493-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VFMV_F_S vfmv.f.s ft7, v16
493+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VFMV_F_S vfmv.f.s ft7, v16
494494
# CHECK-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu
495495
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VFMV_S_F vfmv.s.f v8, ft5
496-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VFMV_F_S vfmv.f.s ft7, v16
496+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VFMV_F_S vfmv.f.s ft7, v16
497497
# CHECK-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu
498498
# CHECK-NEXT: 1 4 1.00 4 VLEN512SiFive7VA[1,2],VLEN512SiFive7VCQ VFMV_S_F vfmv.s.f v8, ft5
499-
# CHECK-NEXT: 1 11 11.00 11 VLEN512SiFive7VA[1,12],VLEN512SiFive7VCQ VFMV_F_S vfmv.f.s ft7, v16
499+
# CHECK-NEXT: 1 11 3.00 11 VLEN512SiFive7VA[1,4],VLEN512SiFive7VCQ VFMV_F_S vfmv.f.s ft7, v16
500500

501501
# CHECK: Resources:
502502
# CHECK-NEXT: [0] - VLEN512SiFive7FDiv
@@ -510,7 +510,7 @@ vfmv.f.s f7, v16
510510

511511
# CHECK: Resource pressure per iteration:
512512
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
513-
# CHECK-NEXT: - - 112.00 - 996.00 120.00 - -
513+
# CHECK-NEXT: - - 112.00 - 932.00 120.00 - -
514514

515515
# CHECK: Resource pressure by instruction:
516516
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
@@ -724,25 +724,25 @@ vfmv.f.s f7, v16
724724
# CHECK-NEXT: - - - - 17.00 1.00 - - vmv8r.v v8, v16
725725
# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m1, tu, mu
726726
# CHECK-NEXT: - - - - 2.00 1.00 - - vmv.s.x v8, t0
727-
# CHECK-NEXT: - - - - 12.00 1.00 - - vmv.x.s t2, v16
727+
# CHECK-NEXT: - - - - 4.00 1.00 - - vmv.x.s t2, v16
728728
# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m2, tu, mu
729729
# CHECK-NEXT: - - - - 2.00 1.00 - - vmv.s.x v8, t0
730-
# CHECK-NEXT: - - - - 12.00 1.00 - - vmv.x.s t2, v16
730+
# CHECK-NEXT: - - - - 4.00 1.00 - - vmv.x.s t2, v16
731731
# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m4, tu, mu
732732
# CHECK-NEXT: - - - - 2.00 1.00 - - vmv.s.x v8, t0
733-
# CHECK-NEXT: - - - - 12.00 1.00 - - vmv.x.s t2, v16
733+
# CHECK-NEXT: - - - - 4.00 1.00 - - vmv.x.s t2, v16
734734
# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m8, tu, mu
735735
# CHECK-NEXT: - - - - 2.00 1.00 - - vmv.s.x v8, t0
736-
# CHECK-NEXT: - - - - 12.00 1.00 - - vmv.x.s t2, v16
736+
# CHECK-NEXT: - - - - 4.00 1.00 - - vmv.x.s t2, v16
737737
# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m1, tu, mu
738738
# CHECK-NEXT: - - - - 2.00 1.00 - - vfmv.s.f v8, ft5
739-
# CHECK-NEXT: - - - - 12.00 1.00 - - vfmv.f.s ft7, v16
739+
# CHECK-NEXT: - - - - 4.00 1.00 - - vfmv.f.s ft7, v16
740740
# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m2, tu, mu
741741
# CHECK-NEXT: - - - - 2.00 1.00 - - vfmv.s.f v8, ft5
742-
# CHECK-NEXT: - - - - 12.00 1.00 - - vfmv.f.s ft7, v16
742+
# CHECK-NEXT: - - - - 4.00 1.00 - - vfmv.f.s ft7, v16
743743
# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m4, tu, mu
744744
# CHECK-NEXT: - - - - 2.00 1.00 - - vfmv.s.f v8, ft5
745-
# CHECK-NEXT: - - - - 12.00 1.00 - - vfmv.f.s ft7, v16
745+
# CHECK-NEXT: - - - - 4.00 1.00 - - vfmv.f.s ft7, v16
746746
# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m8, tu, mu
747747
# CHECK-NEXT: - - - - 2.00 1.00 - - vfmv.s.f v8, ft5
748-
# CHECK-NEXT: - - - - 12.00 1.00 - - vfmv.f.s ft7, v16
748+
# CHECK-NEXT: - - - - 4.00 1.00 - - vfmv.f.s ft7, v16

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