We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 84420a2 commit 274db64Copy full SHA for 274db64
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -2576,7 +2576,7 @@ ParseStatus RISCVAsmParser::parseReglist(OperandVector &Operands) {
2576
RegEnd = RegStart;
2577
2578
auto Encode = RISCVZC::encodeRlist(RegEnd, IsEABI);
2579
- if (Encode == 16)
+ if (Encode == RISCVZC::INVALID_RLIST)
2580
return Error(S, "invalid register list");
2581
Operands.push_back(RISCVOperand::createRlist(Encode, S));
2582
0 commit comments