Skip to content

Commit 27ac5b9

Browse files
committed
Rename functions
1 parent bd9b711 commit 27ac5b9

File tree

1 file changed

+18
-18
lines changed

1 file changed

+18
-18
lines changed

llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
22
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 < %s | FileCheck --check-prefix=GFX942 %s
33

4-
define <2 x i32> @masked_load_ptr1_mask_v2i32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
5-
; GFX942-LABEL: masked_load_ptr1_mask_v2i32:
4+
define <2 x i32> @uniform_masked_load_ptr1_mask_v2i32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
5+
; GFX942-LABEL: uniform_masked_load_ptr1_mask_v2i32:
66
; GFX942: ; %bb.0: ; %entry
77
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
88
; GFX942-NEXT: v_and_b32_e32 v0, 1, v0
@@ -24,8 +24,8 @@ entry:
2424
ret <2 x i32> %result
2525
}
2626

27-
define <4 x i32> @masked_load_ptr1_mask_v4i32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
28-
; GFX942-LABEL: masked_load_ptr1_mask_v4i32:
27+
define <4 x i32> @uniform_masked_load_ptr1_mask_v4i32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
28+
; GFX942-LABEL: uniform_masked_load_ptr1_mask_v4i32:
2929
; GFX942: ; %bb.0: ; %entry
3030
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3131
; GFX942-NEXT: v_and_b32_e32 v0, 1, v0
@@ -49,8 +49,8 @@ entry:
4949
ret <4 x i32> %result
5050
}
5151

52-
define <4 x float> @masked_load_ptr1_mask_v4f32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
53-
; GFX942-LABEL: masked_load_ptr1_mask_v4f32:
52+
define <4 x float> @uniform_masked_load_ptr1_mask_v4f32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
53+
; GFX942-LABEL: uniform_masked_load_ptr1_mask_v4f32:
5454
; GFX942: ; %bb.0: ; %entry
5555
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5656
; GFX942-NEXT: v_and_b32_e32 v0, 1, v0
@@ -74,8 +74,8 @@ entry:
7474
ret <4 x float> %result
7575
}
7676

77-
define <8 x i32> @masked_load_ptr1_mask_v8i32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
78-
; GFX942-LABEL: masked_load_ptr1_mask_v8i32:
77+
define <8 x i32> @uniform_masked_load_ptr1_mask_v8i32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
78+
; GFX942-LABEL: uniform_masked_load_ptr1_mask_v8i32:
7979
; GFX942: ; %bb.0: ; %entry
8080
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
8181
; GFX942-NEXT: v_and_b32_e32 v0, 1, v0
@@ -105,8 +105,8 @@ entry:
105105
ret <8 x i32> %result
106106
}
107107

108-
define <8 x float> @masked_load_ptr1_mask_v8f32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
109-
; GFX942-LABEL: masked_load_ptr1_mask_v8f32:
108+
define <8 x float> @uniform_masked_load_ptr1_mask_v8f32(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
109+
; GFX942-LABEL: uniform_masked_load_ptr1_mask_v8f32:
110110
; GFX942: ; %bb.0: ; %entry
111111
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
112112
; GFX942-NEXT: v_and_b32_e32 v0, 1, v0
@@ -136,8 +136,8 @@ entry:
136136
ret <8 x float> %result
137137
}
138138

139-
define <8 x i16> @masked_load_ptr1_mask_v8i16(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
140-
; GFX942-LABEL: masked_load_ptr1_mask_v8i16:
139+
define <8 x i16> @uniform_masked_load_ptr1_mask_v8i16(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
140+
; GFX942-LABEL: uniform_masked_load_ptr1_mask_v8i16:
141141
; GFX942: ; %bb.0: ; %entry
142142
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
143143
; GFX942-NEXT: v_and_b32_e32 v0, 1, v0
@@ -161,8 +161,8 @@ entry:
161161
ret <8 x i16> %result
162162
}
163163

164-
define <8 x half> @masked_load_ptr1_mask_v8f16(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
165-
; GFX942-LABEL: masked_load_ptr1_mask_v8f16:
164+
define <8 x half> @uniform_masked_load_ptr1_mask_v8f16(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
165+
; GFX942-LABEL: uniform_masked_load_ptr1_mask_v8f16:
166166
; GFX942: ; %bb.0: ; %entry
167167
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
168168
; GFX942-NEXT: v_and_b32_e32 v0, 1, v0
@@ -186,8 +186,8 @@ entry:
186186
ret <8 x half> %result
187187
}
188188

189-
define <8 x bfloat> @masked_load_ptr1_mask_v8bf16(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
190-
; GFX942-LABEL: masked_load_ptr1_mask_v8bf16:
189+
define <8 x bfloat> @uniform_masked_load_ptr1_mask_v8bf16(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
190+
; GFX942-LABEL: uniform_masked_load_ptr1_mask_v8bf16:
191191
; GFX942: ; %bb.0: ; %entry
192192
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
193193
; GFX942-NEXT: v_and_b32_e32 v0, 1, v0
@@ -211,8 +211,8 @@ entry:
211211
ret <8 x bfloat> %result
212212
}
213213

214-
define <16 x i8> @masked_load_ptr1_mask_v16i8(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
215-
; GFX942-LABEL: masked_load_ptr1_mask_v16i8:
214+
define <16 x i8> @uniform_masked_load_ptr1_mask_v16i8(ptr addrspace(1) inreg nocapture readonly %ptr, i1 %mask) {
215+
; GFX942-LABEL: uniform_masked_load_ptr1_mask_v16i8:
216216
; GFX942: ; %bb.0: ; %entry
217217
; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
218218
; GFX942-NEXT: v_and_b32_e32 v0, 1, v0

0 commit comments

Comments
 (0)