@@ -2845,26 +2845,26 @@ declare i32 @llvm.amdgcn.readfirstlane(i32)
28452845
28462846@gv = constant i32 0
28472847
2848- define amdgpu_kernel void @readfirstlane_constant (i32 %arg ) {
2848+ define amdgpu_kernel void @readfirstlane_constant (i32 %arg , ptr %ptr ) {
28492849; CHECK-LABEL: @readfirstlane_constant(
28502850; CHECK-NEXT: [[VAR:%.*]] = call i32 @llvm.amdgcn.readfirstlane.i32(i32 [[ARG:%.*]])
2851- ; CHECK-NEXT: store volatile i32 [[VAR]], ptr undef , align 4
2852- ; CHECK-NEXT: store volatile i32 0, ptr undef , align 4
2853- ; CHECK-NEXT: store volatile i32 123, ptr undef , align 4
2854- ; CHECK-NEXT: store volatile i32 ptrtoint (ptr @gv to i32), ptr undef , align 4
2855- ; CHECK-NEXT: store volatile i32 undef, ptr undef , align 4
2851+ ; CHECK-NEXT: store volatile i32 [[VAR]], ptr [[PTR:%.*]] , align 4
2852+ ; CHECK-NEXT: store volatile i32 0, ptr [[PTR]] , align 4
2853+ ; CHECK-NEXT: store volatile i32 123, ptr [[PTR]] , align 4
2854+ ; CHECK-NEXT: store volatile i32 ptrtoint (ptr @gv to i32), ptr [[PTR]] , align 4
2855+ ; CHECK-NEXT: store volatile i32 undef, ptr [[PTR]] , align 4
28562856; CHECK-NEXT: ret void
28572857;
28582858 %var = call i32 @llvm.amdgcn.readfirstlane (i32 %arg )
28592859 %zero = call i32 @llvm.amdgcn.readfirstlane (i32 0 )
28602860 %imm = call i32 @llvm.amdgcn.readfirstlane (i32 123 )
28612861 %constexpr = call i32 @llvm.amdgcn.readfirstlane (i32 ptrtoint (ptr @gv to i32 ))
28622862 %undef = call i32 @llvm.amdgcn.readfirstlane (i32 undef )
2863- store volatile i32 %var , ptr undef
2864- store volatile i32 %zero , ptr undef
2865- store volatile i32 %imm , ptr undef
2866- store volatile i32 %constexpr , ptr undef
2867- store volatile i32 %undef , ptr undef
2863+ store volatile i32 %var , ptr %ptr
2864+ store volatile i32 %zero , ptr %ptr
2865+ store volatile i32 %imm , ptr %ptr
2866+ store volatile i32 %constexpr , ptr %ptr
2867+ store volatile i32 %undef , ptr %ptr
28682868 ret void
28692869}
28702870
@@ -2931,26 +2931,26 @@ bb1:
29312931
29322932declare i32 @llvm.amdgcn.readlane (i32 , i32 )
29332933
2934- define amdgpu_kernel void @readlane_constant (i32 %arg , i32 %lane ) {
2934+ define amdgpu_kernel void @readlane_constant (i32 %arg , i32 %lane , ptr %ptr ) {
29352935; CHECK-LABEL: @readlane_constant(
29362936; CHECK-NEXT: [[VAR:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[ARG:%.*]], i32 7)
2937- ; CHECK-NEXT: store volatile i32 [[VAR]], ptr undef , align 4
2938- ; CHECK-NEXT: store volatile i32 0, ptr undef , align 4
2939- ; CHECK-NEXT: store volatile i32 123, ptr undef , align 4
2940- ; CHECK-NEXT: store volatile i32 ptrtoint (ptr @gv to i32), ptr undef , align 4
2941- ; CHECK-NEXT: store volatile i32 undef, ptr undef , align 4
2937+ ; CHECK-NEXT: store volatile i32 [[VAR]], ptr [[PTR:%.*]] , align 4
2938+ ; CHECK-NEXT: store volatile i32 0, ptr [[PTR]] , align 4
2939+ ; CHECK-NEXT: store volatile i32 123, ptr [[PTR]] , align 4
2940+ ; CHECK-NEXT: store volatile i32 ptrtoint (ptr @gv to i32), ptr [[PTR]] , align 4
2941+ ; CHECK-NEXT: store volatile i32 undef, ptr [[PTR]] , align 4
29422942; CHECK-NEXT: ret void
29432943;
29442944 %var = call i32 @llvm.amdgcn.readlane (i32 %arg , i32 7 )
29452945 %zero = call i32 @llvm.amdgcn.readlane (i32 0 , i32 %lane )
29462946 %imm = call i32 @llvm.amdgcn.readlane (i32 123 , i32 %lane )
29472947 %constexpr = call i32 @llvm.amdgcn.readlane (i32 ptrtoint (ptr @gv to i32 ), i32 %lane )
29482948 %undef = call i32 @llvm.amdgcn.readlane (i32 undef , i32 %lane )
2949- store volatile i32 %var , ptr undef
2950- store volatile i32 %zero , ptr undef
2951- store volatile i32 %imm , ptr undef
2952- store volatile i32 %constexpr , ptr undef
2953- store volatile i32 %undef , ptr undef
2949+ store volatile i32 %var , ptr %ptr
2950+ store volatile i32 %zero , ptr %ptr
2951+ store volatile i32 %imm , ptr %ptr
2952+ store volatile i32 %constexpr , ptr %ptr
2953+ store volatile i32 %undef , ptr %ptr
29542954 ret void
29552955}
29562956
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