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[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
Mostly removing unnecessary -global-isel-abort=2 or adding fallback messages
1 parent 5f9db08 commit 28064bf

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-1366
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llvm/test/CodeGen/AArch64/abs.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -mtriple=aarch64-none-linux-gnu %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc -mtriple=aarch64-none-linux-gnu -global-isel -global-isel-abort=2 %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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; RUN: llc -mtriple=aarch64-none-linux-gnu -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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; ===== Legal Scalars =====
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Lines changed: 23 additions & 33 deletions
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; RUN: llc < %s -mtriple=arm64-apple-ios7.0.0 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-apple-ios7.0.0 -O0 -pass-remarks-missed=gisel* -global-isel-abort=2 | FileCheck %s --check-prefixes=GISEL,FALLBACK
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=arm64-apple-ios7.0.0 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc < %s -mtriple=arm64-apple-ios7.0.0 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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6-
; Function Attrs: nounwind readnone
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declare i32 @llvm.ctlz.i32(i32, i1) #0
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declare i64 @llvm.ctlz.i64(i64, i1) #1
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; Function Attrs: nounwind ssp
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; FALLBACK-NOT: remark{{.*}}clrsb32
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define i32 @clrsb32(i32 %x) #2 {
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; CHECK-LABEL: clrsb32:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: cls w0, w0
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; CHECK-NEXT: ret
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entry:
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%shr = ashr i32 %x, 31
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%xor = xor i32 %shr, %x
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%mul = shl i32 %xor, 1
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%add = or i32 %mul, 1
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%0 = tail call i32 @llvm.ctlz.i32(i32 %add, i1 false)
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ret i32 %0
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; CHECK-LABEL: clrsb32
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; CHECK: cls [[TEMP:w[0-9]+]], [[TEMP]]
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; GISEL-LABEL: clrsb32
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; GISEL: cls [[TEMP:w[0-9]+]], [[TEMP]]
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}
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; Function Attrs: nounwind ssp
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; FALLBACK-NOT: remark{{.*}}clrsb64
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define i64 @clrsb64(i64 %x) #3 {
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; CHECK-LABEL: clrsb64:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: cls x0, x0
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; CHECK-NEXT: ret
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entry:
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%shr = ashr i64 %x, 63
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%xor = xor i64 %shr, %x
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%mul = shl nsw i64 %xor, 1
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%add = or i64 %mul, 1
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%0 = tail call i64 @llvm.ctlz.i64(i64 %add, i1 false)
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ret i64 %0
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; CHECK-LABEL: clrsb64
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; CHECK: cls [[TEMP:x[0-9]+]], [[TEMP]]
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; GISEL-LABEL: clrsb64
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; GISEL: cls [[TEMP:x[0-9]+]], [[TEMP]]
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}
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; Function Attrs: nounwind ssp
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; FALLBACK-NOT: remark{{.*}}clrsb32_zeroundef
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define i32 @clrsb32_zeroundef(i32 %x) #2 {
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; CHECK-LABEL: clrsb32_zeroundef:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: cls w0, w0
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; CHECK-NEXT: ret
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entry:
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%shr = ashr i32 %x, 31
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%xor = xor i32 %shr, %x
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%mul = shl i32 %xor, 1
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%add = or i32 %mul, 1
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%0 = tail call i32 @llvm.ctlz.i32(i32 %add, i1 true)
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ret i32 %0
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; CHECK-LABEL: clrsb32_zeroundef
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; CHECK: cls [[TEMP:w[0-9]+]], [[TEMP]]
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; GISEL-LABEL: clrsb32_zeroundef
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; GISEL: cls [[TEMP:w[0-9]+]], [[TEMP]]
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}
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; Function Attrs: nounwind ssp
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; FALLBACK-NOT: remark{{.*}}clrsb64
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define i64 @clrsb64_zeroundef(i64 %x) #3 {
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; CHECK-LABEL: clrsb64_zeroundef:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: cls x0, x0
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; CHECK-NEXT: ret
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entry:
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%shr = ashr i64 %x, 63
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%xor = xor i64 %shr, %x
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%mul = shl nsw i64 %xor, 1
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%add = or i64 %mul, 1
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%0 = tail call i64 @llvm.ctlz.i64(i64 %add, i1 true)
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ret i64 %0
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; CHECK-LABEL: clrsb64_zeroundef
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; CHECK: cls [[TEMP:x[0-9]+]], [[TEMP]]
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; GISEL-LABEL: clrsb64_zeroundef
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; GISEL: cls [[TEMP:x[0-9]+]], [[TEMP]]
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CHECK-GI: {{.*}}
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; CHECK-SD: {{.*}}

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