fixup! Address review comments.

Author: topperc

llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp

@@ -62,17 +62,15 @@ class FoldableOffset {
 
   FoldableOffset &operator+=(int64_t RHS) {
     if (!Offset)
-      Offset = RHS;
-    else
-      Offset = (uint64_t)*Offset + (uint64_t)RHS;
+      Offset = 0;
+    Offset = (uint64_t)*Offset + (uint64_t)RHS;
     return *this;
   }
 
   FoldableOffset &operator-=(int64_t RHS) {
     if (!Offset)
-      Offset = -(uint64_t)RHS;
-    else
-      Offset = (uint64_t)*Offset - (uint64_t)RHS;
+      Offset = 0;
+    Offset = (uint64_t)*Offset - (uint64_t)RHS;
     return *this;
   }
 
@@ -245,9 +243,7 @@ bool RISCVFoldMemOffset::runOnMachineFunction(MachineFunction &MF) {
   if (MF.getFunction().hasOptSize())
     return false;
 
-  const MachineRegisterInfo &MRI = MF.getRegInfo();
-  const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>();
-  const RISCVInstrInfo &TII = *ST.getInstrInfo();
+  MachineRegisterInfo &MRI = MF.getRegInfo();
 
   bool MadeChange = false;
   for (MachineBasicBlock &MBB : MF) {
@@ -277,10 +273,7 @@ bool RISCVFoldMemOffset::runOnMachineFunction(MachineFunction &MF) {
       for (auto [MemMI, NewOffset] : FoldableInstrs)
         MemMI->getOperand(2).setImm(NewOffset);
 
-      // Replace ADDI with a copy.
-      BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(RISCV::COPY))
-          .add(MI.getOperand(0))
-          .add(MI.getOperand(1));
+      MRI.replaceRegWith(MI.getOperand(0).getReg(), MI.getOperand(1).getReg());
       MI.eraseFromParent();
     }
   }

llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp

@@ -238,13 +238,6 @@ bool RISCVMergeBaseOffsetOpt::foldLargeOffset(MachineInstr &Hi,
     foldOffset(Hi, Lo, TailAdd, Offset);
     OffsetTail.eraseFromParent();
     return true;
-  } else if (OffsetTail.getOpcode() == RISCV::COPY &&
-             OffsetTail.getOperand(1).getReg() == RISCV::X0) {
-    // Fold mem offset can leave copies from X0 in place of an ADDI and they
-    // might not have been eliminated yet.
-    foldOffset(Hi, Lo, TailAdd, 0);
-    OffsetTail.eraseFromParent();
-    return true;
   }
   return false;
 }

llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll

@@ -1167,8 +1167,10 @@ declare void @f(ptr)
 define i32 @crash() {
 ; RV32I-LABEL: crash:
 ; RV32I:       # %bb.0: # %entry
-; RV32I-NEXT:    lui a0, %hi(g+401)
-; RV32I-NEXT:    lbu a0, %lo(g+401)(a0)
+; RV32I-NEXT:    lui a0, %hi(g)
+; RV32I-NEXT:    addi a0, a0, %lo(g)
+; RV32I-NEXT:    add a0, a0, zero
+; RV32I-NEXT:    lbu a0, 401(a0)
 ; RV32I-NEXT:    seqz a0, a0
 ; RV32I-NEXT:    sw a0, 0(zero)
 ; RV32I-NEXT:    li a0, 0
@@ -1177,17 +1179,21 @@ define i32 @crash() {
 ; RV32I-MEDIUM-LABEL: crash:
 ; RV32I-MEDIUM:       # %bb.0: # %entry
 ; RV32I-MEDIUM-NEXT:  .Lpcrel_hi14:
-; RV32I-MEDIUM-NEXT:    auipc a0, %pcrel_hi(g+401)
-; RV32I-MEDIUM-NEXT:    lbu a0, %pcrel_lo(.Lpcrel_hi14)(a0)
+; RV32I-MEDIUM-NEXT:    auipc a0, %pcrel_hi(g)
+; RV32I-MEDIUM-NEXT:    addi a0, a0, %pcrel_lo(.Lpcrel_hi14)
+; RV32I-MEDIUM-NEXT:    add a0, a0, zero
+; RV32I-MEDIUM-NEXT:    lbu a0, 401(a0)
 ; RV32I-MEDIUM-NEXT:    seqz a0, a0
 ; RV32I-MEDIUM-NEXT:    sw a0, 0(zero)
 ; RV32I-MEDIUM-NEXT:    li a0, 0
 ; RV32I-MEDIUM-NEXT:    ret
 ;
 ; RV64I-LABEL: crash:
 ; RV64I:       # %bb.0: # %entry
-; RV64I-NEXT:    lui a0, %hi(g+401)
-; RV64I-NEXT:    lbu a0, %lo(g+401)(a0)
+; RV64I-NEXT:    lui a0, %hi(g)
+; RV64I-NEXT:    addi a0, a0, %lo(g)
+; RV64I-NEXT:    add a0, a0, zero
+; RV64I-NEXT:    lbu a0, 401(a0)
 ; RV64I-NEXT:    seqz a0, a0
 ; RV64I-NEXT:    sw a0, 0(zero)
 ; RV64I-NEXT:    li a0, 0
@@ -1196,8 +1202,10 @@ define i32 @crash() {
 ; RV64I-MEDIUM-LABEL: crash:
 ; RV64I-MEDIUM:       # %bb.0: # %entry
 ; RV64I-MEDIUM-NEXT:  .Lpcrel_hi14:
-; RV64I-MEDIUM-NEXT:    auipc a0, %pcrel_hi(g+401)
-; RV64I-MEDIUM-NEXT:    lbu a0, %pcrel_lo(.Lpcrel_hi14)(a0)
+; RV64I-MEDIUM-NEXT:    auipc a0, %pcrel_hi(g)
+; RV64I-MEDIUM-NEXT:    addi a0, a0, %pcrel_lo(.Lpcrel_hi14)
+; RV64I-MEDIUM-NEXT:    add a0, a0, zero
+; RV64I-MEDIUM-NEXT:    lbu a0, 401(a0)
 ; RV64I-MEDIUM-NEXT:    seqz a0, a0
 ; RV64I-MEDIUM-NEXT:    sw a0, 0(zero)
 ; RV64I-MEDIUM-NEXT:    li a0, 0