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Use foreach to define VGPROp
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llvm/lib/Target/AMDGPU/SIRegisterInfo.td

Lines changed: 5 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1347,18 +1347,12 @@ def VGPRSrc_16 : RegisterOperand<VGPR_16> {
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// TODO: These cases should use default target alignment
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def VGPROp_16 : RegisterOperand<VGPR_16>;
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def VGPROp_32 : RegisterOperand<VGPR_32>;
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def VGPROp_64 : RegisterOperand<VReg_64>;
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def VGPROp_96 : RegisterOperand<VReg_96>;
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def VGPROp_128 : RegisterOperand<VReg_128>;
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def VGPROp_256 : RegisterOperand<VReg_256>;
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def VGPROp_64_Align1 : RegisterOperand<VReg_64>;
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def VGPROp_96_Align1 : RegisterOperand<VReg_96>;
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def VGPROp_128_Align1 : RegisterOperand<VReg_128>;
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def VGPROp_64_Align2 : RegisterOperand<VReg_64_Align2>;
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def VGPROp_128_Align2 : RegisterOperand<VReg_128_Align2>;
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foreach size = ["64", "96", "128", "256" ] in {
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def VGPROp_#size : RegisterOperand<!cast<RegisterClass>("VReg_"#size)>;
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def VGPROp_#size#_Align1 : RegisterOperand<!cast<RegisterClass>("VReg_"#size)>;
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def VGPROp_#size#_Align2 : RegisterOperand<!cast<RegisterClass>("VReg_"#size#_Align2)>;
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}
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//===----------------------------------------------------------------------===//
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// ASrc_* Operands with an AccVGPR

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