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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=armv7a < %s | FileCheck %s --check-prefix=ARM
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; RUN: llc -mtriple=armv6m < %s | FileCheck %s --check-prefix=THUMB
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; RUN: llc -mtriple=armv7m < %s | FileCheck %s --check-prefix=THUMB2
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declare i8 @llvm.smax.i8(i8 %a, i8 %b) readnone
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define i8 @smaxi8_zero(i8 %a) {
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; ARM-LABEL: smaxi8_zero:
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; ARM: @ %bb.0:
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; ARM-NEXT: sxtb r0, r0
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; ARM-NEXT: bic r0, r0, r0, asr #31
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; ARM-NEXT: bx lr
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;
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; THUMB-LABEL: smaxi8_zero:
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; THUMB: @ %bb.0:
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; THUMB-NEXT: sxtb r0, r0
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; THUMB-NEXT: asrs r1, r0, #31
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; THUMB-NEXT: bics r0, r1
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; THUMB-NEXT: bx lr
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;
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; THUMB2-LABEL: smaxi8_zero:
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; THUMB2: @ %bb.0:
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; THUMB2-NEXT: sxtb r0, r0
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; THUMB2-NEXT: bic.w r0, r0, r0, asr #31
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; THUMB2-NEXT: bx lr
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%c = call i8 @llvm.smax.i8(i8 %a, i8 0)
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ret i8 %c
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}
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declare i16 @llvm.smax.i16(i16 %a, i16 %b) readnone
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define i16 @smaxi16_zero(i16 %a) {
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; ARM-LABEL: smaxi16_zero:
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; ARM: @ %bb.0:
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; ARM-NEXT: sxth r0, r0
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; ARM-NEXT: bic r0, r0, r0, asr #31
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; ARM-NEXT: bx lr
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;
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; THUMB-LABEL: smaxi16_zero:
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; THUMB: @ %bb.0:
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; THUMB-NEXT: sxth r0, r0
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; THUMB-NEXT: asrs r1, r0, #31
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; THUMB-NEXT: bics r0, r1
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; THUMB-NEXT: bx lr
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;
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; THUMB2-LABEL: smaxi16_zero:
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; THUMB2: @ %bb.0:
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; THUMB2-NEXT: sxth r0, r0
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; THUMB2-NEXT: bic.w r0, r0, r0, asr #31
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; THUMB2-NEXT: bx lr
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%c = call i16 @llvm.smax.i16(i16 %a, i16 0)
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ret i16 %c
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}
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declare i32 @llvm.smax.i32(i32 %a, i32 %b) readnone
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define i32 @smaxi32_zero(i32 %a) {
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; ARM-LABEL: smaxi32_zero:
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; ARM: @ %bb.0:
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; ARM-NEXT: bic r0, r0, r0, asr #31
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; ARM-NEXT: bx lr
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;
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; THUMB-LABEL: smaxi32_zero:
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; THUMB: @ %bb.0:
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; THUMB-NEXT: asrs r1, r0, #31
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; THUMB-NEXT: bics r0, r1
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; THUMB-NEXT: bx lr
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;
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; THUMB2-LABEL: smaxi32_zero:
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; THUMB2: @ %bb.0:
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; THUMB2-NEXT: bic.w r0, r0, r0, asr #31
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; THUMB2-NEXT: bx lr
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%c = call i32 @llvm.smax.i32(i32 %a, i32 0)
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ret i32 %c
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}
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; SMIN
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declare i8 @llvm.smin.i8(i8 %a, i8 %b) readnone
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define i8 @smini8_zero(i8 %a) {
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; ARM-LABEL: smini8_zero:
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; ARM: @ %bb.0:
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; ARM-NEXT: sxtb r0, r0
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; ARM-NEXT: cmp r0, #0
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; ARM-NEXT: movpl r0, #0
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; ARM-NEXT: bx lr
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;
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; THUMB-LABEL: smini8_zero:
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; THUMB: @ %bb.0:
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; THUMB-NEXT: sxtb r0, r0
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; THUMB-NEXT: cmp r0, #0
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; THUMB-NEXT: bmi .LBB3_2
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; THUMB-NEXT: @ %bb.1:
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; THUMB-NEXT: movs r0, #0
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; THUMB-NEXT: .LBB3_2:
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; THUMB-NEXT: bx lr
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;
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; THUMB2-LABEL: smini8_zero:
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; THUMB2: @ %bb.0:
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; THUMB2-NEXT: sxtb r0, r0
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; THUMB2-NEXT: cmp r0, #0
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; THUMB2-NEXT: it pl
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; THUMB2-NEXT: movpl r0, #0
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; THUMB2-NEXT: bx lr
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%c = call i8 @llvm.smin.i8(i8 %a, i8 0)
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ret i8 %c
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}
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declare i16 @llvm.smin.i16(i16 %a, i16 %b) readnone
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define i16 @smini16_zero(i16 %a) {
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; ARM-LABEL: smini16_zero:
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; ARM: @ %bb.0:
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; ARM-NEXT: sxth r0, r0
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; ARM-NEXT: cmp r0, #0
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; ARM-NEXT: movpl r0, #0
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; ARM-NEXT: bx lr
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;
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; THUMB-LABEL: smini16_zero:
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; THUMB: @ %bb.0:
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; THUMB-NEXT: sxth r0, r0
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; THUMB-NEXT: cmp r0, #0
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; THUMB-NEXT: bmi .LBB4_2
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; THUMB-NEXT: @ %bb.1:
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; THUMB-NEXT: movs r0, #0
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; THUMB-NEXT: .LBB4_2:
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; THUMB-NEXT: bx lr
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;
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; THUMB2-LABEL: smini16_zero:
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; THUMB2: @ %bb.0:
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; THUMB2-NEXT: sxth r0, r0
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; THUMB2-NEXT: cmp r0, #0
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; THUMB2-NEXT: it pl
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; THUMB2-NEXT: movpl r0, #0
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; THUMB2-NEXT: bx lr
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%c = call i16 @llvm.smin.i16(i16 %a, i16 0)
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ret i16 %c
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}
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declare i32 @llvm.smin.i32(i32 %a, i32 %b) readnone
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define i32 @smini32_zero(i32 %a) {
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; ARM-LABEL: smini32_zero:
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; ARM: @ %bb.0:
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; ARM-NEXT: cmp r0, #0
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; ARM-NEXT: movpl r0, #0
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; ARM-NEXT: bx lr
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;
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; THUMB-LABEL: smini32_zero:
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; THUMB: @ %bb.0:
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; THUMB-NEXT: cmp r0, #0
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; THUMB-NEXT: bmi .LBB5_2
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; THUMB-NEXT: @ %bb.1:
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; THUMB-NEXT: movs r0, #0
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; THUMB-NEXT: .LBB5_2:
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; THUMB-NEXT: bx lr
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;
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; THUMB2-LABEL: smini32_zero:
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; THUMB2: @ %bb.0:
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; THUMB2-NEXT: cmp r0, #0
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; THUMB2-NEXT: it pl
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; THUMB2-NEXT: movpl r0, #0
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; THUMB2-NEXT: bx lr
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%c = call i32 @llvm.smin.i32(i32 %a, i32 0)
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ret i32 %c
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}

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